AD9433BSVZ-105: 12位、105/125 MSPS IF采样模数转换器
The AD9433 is a 12-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is designed for ease of use. The product operates up to 125 Msps conversion rate and is optimized for outstanding dynamic performance in wideband and high IF carrier systems.
The ADC requires a +5V analog power supply and a differential encode clock for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS compatible and a separate output power supply pin supports interfacing with 3.3V or 2.5V logic.
A user-selectable, on-chip proprietary circuit optimizes spurious-free dynamic range (SFDR) versus signal-to-noise-and-distortion (SINAD) ratio performance for different input signal frequencies, providing as much as 83 dBc SFDR performance over the dc to 70 MHz band.
The encode clock supports either differential or single-ended input and is PECL-compatible. The output format is user-selectable for binary or two's complement and provides an overrange (OR) signal.
Fabricated on an advanced BiCMOS process, the AD9433 is available in a thermally enhanced 52-lead plastic quad flatpack specified over the industrial temperature range (-40°C to +85°C) and is pin-compatible with the AD9432.
AD9433是一款12位单芯片采样模数转换器（ADC）,内置一个片内采样保持电路,易于使用。该产品的转换速率最高可达125 MSPS,具有杰出的动态性能,适合宽带和高IF载波系统使用。
该ADC要求采用+5V模拟电源供电及差分编码时钟信号,以便充分发挥其工作性能。对于大多数应用来说,无需外部基准电压源或驱动器件。数字输出为TTL/CMOS兼容,单独的输出电源引脚支持3.3V或2.5V逻辑接口。
一个用户可选择的片内专有电路可以针对不同的输入信号频率,优化无寄生动态范围（SFDR）对信纳比（SINAD）的性能,在DC至70 MHz带宽上SFDR可达83 dBc。
编码时钟支持差分或单端输入,且为PECL兼容。提供二进制或二进制补码输出格式供用户选择,并提供一个超量程（OR）信号。
AD9433采用先进的BiCMOS工艺制造,提供散热增强型52引脚塑料四方扁平封装,额定温度范围为-40°C至+85°C工业温度范围,且与AD9432引脚兼容
AD9433BSVZ-105 特点
- IF Sampling up to 350 MHz
- SNR = 67.5 dB, Fin up to Nyquist at 105 MSPS
- SFDR = 83 dBc, 70 MHz Fin at 105 MSPS
- SFDR = 72 dBc, 150 MHz Fin at 105 MSPS
- 2 Vp-p Analog Input Range Option
- On-Chip Clock Duty Cycle Stabilization
- On-Chip Reference and Track/Hold
- SFDR Optimization Circuit
- Excellent Linearity
- DNL = ± 0.25 LSB (Typ)
- INL = ± 0.5 LSB (Typ) - 750 MHz Full Power Analog Bandwidth
- Power Dissipation = 1.35W at 125 MSPS
- Two's Complement or Offset Binary Data Format
- IF采样高达350 MHz
- 信噪比（SNR）：
67.5 dB（Fin最高为Nyquist频率,105 MSPS） - 无杂散动态范围（SFDR）：
83 dBc（70 MHz Fin,105 MSPS） - 无杂散动态范围（SFDR）：
72 dBc（150 MHz Fin,105 MSPS） - 可选择2 Vp-p模拟输入范围
- 片内时钟占空比稳定功能
- 片内基准电压源和采样保持
- SFDR优化电路
- 出色的线性度
- 微分非线性（DNL）= ±0.25 LSB（典型值）
- 积分非线性（INL）= ±0.5 LSB（典型值） - 750 MHz全功率模拟带宽
- 功耗：1.35 W（125 MSPS）
- 数据格式：二进制补码或偏移二进制
AD9433BSVZ-105 功能框图
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| 产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
|---|---|---|---|---|
| AD9433BSQZ-105 | 量产 | 52 ld LQFP (10x10x1.4mm W/(5.9mm Heatsink) | 52 | 工业 |
| AD9433BSQZ-125 | 量产 | 52 ld LQFP (10x10x1.4mm W/(5.9mm Heatsink) | 52 | 工业 |
| AD9433BSVZ-105 | 量产 | 52 | 工业 | |
| AD9433BSVZ-125 | 量产 | 52 | 工业 |
AD9433BSVZ-105 应用技术支持与电子电路设计开发资源下载
- AD9433 数据手册DataSheet下载 . pdf
- Analog Devices, Inc.ADI 美国模拟器件公司产品订购手册 .pdf
- ADC模数转换器选型指南 . pdf
