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AD9626BCPZ-250:  12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

The AD9626 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution.

The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are CMOS compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.

Fabricated on an advanced CMOS process, the AD9626 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).

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产品焦点 Product Highlights

1. High Performance–Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input.
2. Low Power–Consumes only 364 mW @ 250 MSPS.
3. Ease of Use–CMOS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.
4. Serial Port Control–Standard serial port interface supports various product functions, such as data formatting, clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.
5. Pin-Compatible Family–10-bit pin-compatible family offered as the AD9601.

产品应用领域 Applications

• Wireless and wired broadband communications
• Cable reverse path
• Communications test equipment
• Radar and satellite subsystems
• Power amplifier linearization

AD9626BCPZ-250 特点

• SNR = 64.8 dBFS @ fIN up to 70 MHz @ 250 MSPS
• ENOB of 10.5 @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS)
• SFDR = 80 dBc @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS)
• Excellent Linearity
  DNL = ±0.3 LSB typical
  INL = ±0.7 LSB typical
• CMOS outputs
  Single data port at up to 250 MHz
  Interleaved dual port @ 1/2 sample rate up to 125 MHz
• 700 MHz full power analog bandwidth
• On-chip reference, no external decoupling required
• Integrated input buffer and track-and-hold
• Low power dissipation
  272 mW @ 170 MSPS
  364 mW @ 250 MSPS
• Programmable input voltage range
  1.0 V to 1.5 V, 1.25 V nominal
• 1.8 V analog and digital supply operation
• Selectable output data format (offset binary, twos complement, Gray code)

AD9626BCPZ-250 功能框图

AD9626 芯片订购指南

产品型号	产品状态	封装	引脚
AD9626-250EBZ	Prodn	EVALUATION BOARDS	56
AD9626BCPZ-170	Prodn	LFCSP:LEADFRM CHIP SCALE	56
AD9626BCPZ-210	Prodn	LFCSP:LEADFRM CHIP SCALE	56
AD9626BCPZ-250	Prodn	LFCSP:LEADFRM CHIP SCALE	56
AD9626BCPZRL7-210	Prodn	LFCSP:LEADFRM CHIP SCALE	56
AD9626BCPZRL7-250	Prodn	LFCSP:LEADFRM CHIP SCALE	56

AD9626BCPZ-250 应用技术支持与电子电路设计开发资源下载

1. AD9626 数据手册DataSheet下载 . pdf
2. Analog Devices, Inc.ADI 美国模拟器件公司产品订购手册 .pdf
3. ADC模数转换器选型指南 . pdf