AT89C51CC02UA-TDSUM 带有16K系统内可编程FLash存储器SOIC-24封装
| Flash (Kbytes) |
16 |
| CAN (mess. Obj.) |
4 |
| ISP |
Yes |
| Self Program Memory |
Yes |
| EEPROM (Kbytes) |
2 |
| RAM (Bytes) |
512 |
| F.max (MHz) |
40 |
| Vcc (V) |
3-5.5 |
| I/O Pins |
20 |
| UART |
1 |
| 16-bit Timers |
1 |
| Watchdog |
Yes |
| ADC |
Yes |
| Packages |
LQFP 32
PLCC 28
SOIC 24
SOIC 28 |
| Pb-Free Packages |
LQFP 32
PLCC 28
SOIC 24
SOIC 28 |
AT89C51CC02 / T89C51CC02 概述
Low pin count 8-bit microcontroller with CAN controller and 16-Kbyte Flash
We recommend to implement an external brown out to prevent any Flash/EEPROM corruption during power-on or power-off. Please refer to related application note: External Brown-out Protection for C51 Microcontrollers with Active High Reset Input
AT89C51CC02UA-TDSUM 特性
- 80C51 Core Architecture
- 256 Bytes of On-chip RAM
- 256 Bytes of On-chip XRAM
- 16K Bytes of On-chip Flash Memory
– Data Retention: 10 Years at 85°C
– Erase/Write Cycle: 100K
- Boot Code Section with Independent Lock Bits
- 2K Bytes of On-chip Flash for Bootloader
- In-System Programming by On-Chip Boot Program (CAN, UART) and IAP Capability
- 2K Bytes of On-chip EEPROM
– Erase/Write Cycle: 100K
- 14-sources 4-level Interrupts
- Three 16-bit Timers/Counters
- Full Duplex UART Compatible 80C51
- Maximum Crystal Frequency 40 MHz. In X2 Mode, 20 MHz (CPU Core, 40 MHz)
- Three or Four Ports: 16 or 20 Digital I/O Lines
- Two-channel 16-bit PCA
– PWM (8-bit)
– High-speed Output
– Timer and Edge Capture
- Double Data Pointer
- 21-bit Watchdog Timer (7 Programmable bits)
- A 10-bit Resolution Analog-to-Digital Converter (ADC) with 8 Multiplexed Inputs
- Full CAN Controller
– Fully Compliant with CAN rev.# 2.0A and 2.0B
– Optimized Structure for Communication Management (Via SFR)
– 4 Independent Message Objects
-Each Message Object Programmable on Transmission or Reception
-Individual Tag and Mask Filters up to 29-bit Identifier/Channel
-8-byte Cyclic Data Register (FIFO)/Message Object
-16-bit Status and Control Register/Message Object
-16-bit Time-Stamping Register/Message Object
-CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message
Object
-Access to Message Object Control and Data Registers Via SFR
-Programmable Reception Buffer Length up to 4 Message Objects
-Priority Management of Reception of Hits on Several Message Objects
Simultaneously (Basic CAN Feature)
-Priority Management for Transmission
-Message Object Overrun Interrupt
– Supports
-Time Triggered Communication
-Autobaud and Listening Mode
-Programmable Automatic Reply Mode
- 1-Mbit/s Maximum Transfer Rate at 8 MHz(1) Crystal Frequency In X2 Mode
- Readable Error Counters
- Programmable Link to On-chip Timer for Time Stamping and Network Synchronization
- Independent Baud Rate Prescaler
- Data, Remote, Error and Overload Frame Handling
- Power-saving Modes
– Idle Mode
– Power-down Mode
- Power Supply: 3 Volts to 5.5 Volts
- Temperature Range: Industrial (-40° to +85°C)
- Packages: SOIC28, SOIC24, PLCC28, VQFP32
AT89C51CC02UA-TDSUM 订购型号
AT89C51CC02UA-TDSUM 应用技术支持与电子电路设计开发资源下载
- AT89C51CC02 数据手册DataSheet 下载. PDF
- 80C51微控制器的复位输入. PDF (编号: Tech 8051 00049)
- 80C51在系统Flash编程. PDF (编号:8051 00050)
