The XR16C854D1 (854) is a universal asynchronous receiver and transmitter (UART) with is an enhanced UART with 128 byte FIFOs, Iindependent Transmit and Receive FIFO counter, automatic hardware/software flow control, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The 854 is an enhanced UART with 128 byte FIFOs, Independent Transmit and Receive FIFO counter, automatic hardware/software flow control, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics. The 854D is available in 64 pin TQFP package. The 64 pin package offers the 16 interface mode which is compatible with the industry standard ST16C554. The XR16C854DV provides constant active interrupt outputs. The 64 pin devices do not offer TXRDY/RXRDY outputs or the default clock select option (CLKSEL). The 854 combines the package interface modes of the 16C554/654 and 68C554/654 series on a single integrated chip.
| 应用技术支持与电子电路设计开发资源下载 | 版本信息 | 大小 |
| XR16C854D 数据资料DataSheet下载:pdf | Rev.V2 | 2 页 |
