HMC821LP6CE FRACTIONAL-N PLL w/ INTEGRATED VCO 860 - 1040, 1720 - 2080, 3440 - 4160 MHz

The HMC821LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL ) with an Integrated Voltage Controlled Oscillator (VCO ). The PLL consists of an integrated low noise VCO with a tri-band output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider. The fractional PLL features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CS P) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.

技术特性
  • RF Bandwidth: 780 to 870 MHz
  • Ultra Low Phase Noise
    -110 dBc/Hz in Band Typ.
  • Figure of Merit (FOM) -227 dBc
  • < 180 fs RMS Jitter
应用领域 APPLICATION
  • Cellular/4G Infrastructure
  • Repeaters and Femtocells
  • Communications Test Equipment
  • CATV Equipment
订购信息 Ordering Information
  • HMC821LP6CE

 

技术指标
Freq. (GHz) Function Max. PFD Freq. (MHz) Figure of Merit (Fract/Int) (dBc/Hz) Freq. Res. (Hz) Bias Supply Package
10 kHz - 8 GHz Fractional-N with Sweeper 75 -221 / -227 3 +5V @ 37mA
+3.3V @ 90mA
LP6C
功能框图 Functional Block Diagram

HMC821LP6CE 功能框图

应用技术支持与电子电路设计开发资源下载 版本信息 大小
HMC821LP6CE 数据资料DataSheet下载:pdf Rev.V2 2 页