技术特性

• High-speed programmable divider
  FMIN: 10 to 160MHz (Pulse swallower technique (With built-in divide-by-2 prescaler))
  AMIN: 2 to 40MHz (Pulse swallower technique)
  0.5 to 10MHz (Direct division technique)
• IF counter
  IFIN: 0.4 to 15MHz (For AM and FM IF counting)
• Reference frequency :
  One of 12 reference frequencies can be selected (using a 4.5 or 7.2MHz crystal element)
  1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50, and 100kHz
• Phase comparator :
  Supports dead zone control.
  Built-in unlocked state detection circuit
  Built-in deadlock clear circuit
  An MOS transistor for an active low-pass filter is built in
• I/O ports :
  Output-only ports: 4 pins
  I/O ports: 2 pins
  Supports the output of a clock time base signal.
• Serial data I/O :
  Support CCB format communication with the system controller.
• Operating ranges
  Supply voltage: 2.7 to 3.6V
  Operating temperature: -40 to +85°C

封装图 MARKING DIAGRAM