MC100EP142:ECL 9-Bit Shift Register

The MC10EP/100EP142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in and serial/parallel out, shifting in one direction. The nine inputs D0 - D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated.

技术特性
  • > 3 GHz Minimum Shift Frequency
  • 9-Bit for Byte-Parity Applications
  • Asynchronous Master Reset
  • Dual Clocks
  • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = –3.0 V to –5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
封装图 MARKING DIAGRAM

MC100EP142 封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC100EP142FAG Active
Pb-free
Halide free
ECL 9-Bit Shift Register LQFP-32 873A-02 2 Tray JEDEC 250  
MC100EP142FAR2G Active
Pb-free
Halide free
ECL 9-Bit Shift Register LQFP-32 873A-02 2 Tape and Reel 2000  
MC100EP142MNG Active
Pb-free
Halide free
ECL 9-Bit Shift Register QFN-32 488AM 1 Tube 74  
MC100EP142MNR4G Active
Pb-free
Halide free
ECL 9-Bit Shift Register QFN-32 488AM 1 Tape and Reel 1000  
数据资料DataSheet下载
概述 文档编号/大小 版本
ECL 9-Bit Shift Register MC100EP142-D(417.0kB) 1