MC10LVEP11: 2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer
The MC10LVEP11 is a 2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single ended CLK input operation is limited to a VCC >= 3.0 V in PECL mode, or VEE <= -3.0 V in NECL mode.
特性
- 240ps Typical Propagation Delay
- Maximum Frequency > 3 GHz Typical
- PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V
- NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V
- Open Input Default State
- Q Outputs will default LOW with inputs open or at VEE
- LVDS Input Compatible
- Pb-Free Packages are Available
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封装图 PACKAGE DIMENSIONS
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| MC10LVEP11DG |
Active |
|
2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer |
SOIC-8 |
751-07 |
1 |
Tube |
98 |
|
| MC10LVEP11DR2G |
Active |
|
2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer |
SOIC-8 |
751-07 |
1 |
Tape and Reel |
2500 |
|
| MC10LVEP11DTG |
Active |
|
2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer |
TSSOP-8 |
948R-02 |
3 |
Tube |
100 |
|
| MC10LVEP11DTR2G |
Active |
|
2.5 V / 3.3 V ECL 1:2 Differential Clock/Data Fanout Buffer |
TSSOP-8 |
948R-02 |
3 |
Tape and Reel |
2500 |
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数据资料DataSheet下载
