NB4L16MMNEVB:NB4L16M 2.5V/3.3V 5 Gb/s Multi Level Clock/Data Input to CML Driver/Receiver/Buffer/ Translator with Internal Termination Evaluation Board
The evaluation board is designed to facilitate a quick evaluation of the NB4L16M Differential Receiver/Driver/Translator. The NB4L16M is designed to function as a high speed receiver/driver/translator device with CML output for use in high speed signal amplification and backplane interface applications. The board is implemented in two layers and provides a high bandwidth 50 Ω controlled impedance environment for higher performance.
特性
- Maximum Input Clock Frequency > 3.5 GHz Typical
- Maximum Input Data Frequency > 5 Gb/s Typical
- 220 ps Typical Propagation Delay
- 65 ps Typical Rise and Fall Times
- CML Output with Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
- CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only
- 50 Ω Internal Input and Output Termination Resistors
- Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices
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NB4L16MMNEVB 实物图
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评估板信息
| 评估板 |
状况 |
无铅(Pb-free) |
简短说明 |
所用产品 |
| NB4L16MMNEVB |
Active |
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NB4L16MMNEVB:NB4L16M 2.5V/3.3V 5 Gb/s Multi Level Clock/Data Input to CML Driver/Receiver/Buffer/ Translator with Internal Termination Evaluation Board |
NB4L16MMNG, NB4L16MMNR2G |
技术文档
