NB6L16:Clock or Data Receiver / Driver / Translator Buffer, 2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL
The NB6L16 is a low skew 1-to 4 clock fanout buffer, designed for clock distribution in mind. The NB6L16 specifically guarantees low output-to-output skew. Optimal design, layout and processing minimize skew within a device and from device to device. The output enable (OE) pin three-states the outputs when low.
特性
- Input/Output clock frequency up to 180 MHz
- Low Skew Ouptuts (50ps)
- Output Enable puts device in three-state mode
- Operating Range: VDD = 3.0 V to 5.25V
- Full Industrial Temperature Range 8-pin SOIC
- Full RoHS certification
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封装图 PACKAGE DIMENSIONS
![NB6L16封装图](/image/on/SOIC-8_PACKAGE_DIMENSIONS.jpg)
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
NB6L16DG |
Active |
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Clock / Data Fanout Buffer, 3.3 V 1:4, with CMOS Outputs |
SOIC-8 |
751-07 |
1 |
Tube |
98 |
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NB6L16DR2G |
Active |
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Clock / Data Fanout Buffer, 3.3 V 1:4, with CMOS Outputs |
SOIC-8 |
751-07 |
1 |
Tape and Reel |
2500 |
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NB6L16MNR4G |
Active |
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Clock / Data Fanout Buffer, 3.3 V 1:4, with CMOS Outputs |
DFN-8 |
506AA |
1 |
Tape and Reel |
1000 |
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