PACVGA105:VGA Port Companion Circuit

The PACVGA105 incorporates 7 channels of ESD protection for signal lines commonly found in a VGA port for PCs. ESD protection is implemented with current steering diodes designed to safely handle the high peak surge currents associated with the IEC-61000-4-2 Level-4 ESD Protection Standard (±8kV contact discharge). When the channels are subjected to an electrostatic discharge, the ESD current pulse is diverted via the protection diodes into the positive supply rails or ground where they may be safely dissipated. The upper ESD diodes for the R, G and B channels are connected to a separate supply rail (VRGB) to facilitate interfacing to graphics controller ICs with low voltage supplies. The remaining channels are connected to the main 5V rail (VCC). The lower diodes for the R, G and B channels are also connected to a dedicated ground pin (GNDA) to minimize crosstalk due to common ground impedance. Two non-inverting buffers are also included in this IC for buffering the HSYNC and VSYNC signals from the graphics controller IC. These buffers will accept TTL input levels and convert them to CMOS output levels that swing between GND and VCC. These drivers have a nominal 60Ω output impedance to match the characteristic impedance of the HSYNC and VSYNC lines of the video cables typically used. The inputs of these drivers also have high impedance pull-ups (50kW nom.) pulling up to the VAUX rail. In addition, the DDC_CLOCK and DDC_DATA channels have 1.8kΩ resistors pulling these inputs up to the main 5V (VCC) rail.

技术特性
  • Seven Channels of ESD Protection Designed to Meet
    IEC−1000−4−2 Level−4 ESD Requirements (8 kV Contact
    Discharge)
  • Very Low Loading Capacitance from ESD Protection Diodes at
    Less than 5 pF Typical
  • TTL to CMOS Level−Translating Buffers for the HSYNC and
    VSYNC Lines
  • Three Independent Supply Pins (VCC, VRGB and VAUX) to
    Facilitate Operation with Sub−Micron Graphics Controller ICs
  • High impedance Pull−Ups (50 k Nominal to VAUX) for HSYNC and VSYNC Inputs
  • Pull−Up Resistors (1.8 k Nominal to VCC) for DDC_CLK and
    DDC_DATA Lines
  • Compact 16−Pin QSOP Package
  • These Devices are Pb−Free and are RoHS Compliant
应用
  • ESD protection and termination resistors for VGA (video) port interfaces
封装图 PACKAGE DIMENSIONS

PACVGA105封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
PACVGA105QR Active
Pb-free
Halide free
VGA Port Companion Circuit QSOP-16 492-01 1 Tape and Reel 2500 $0.3733
数据资料DataSheet下载
概述 文档编号/大小 版本
VGA Port Companion Circuit PACVGA105FUT1/D (94.0kB) 2