技术特性

• Memories
  • 4 K or 8 Kbytes Program memory: ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention: 20 years at 55°C.
  • 256 bytes RAM
• Clock, Reset and Supply Management
  • Enhanced reset system
  • Enhanced low voltage supply supervisor (LVD) with 3 programmable levels and auxiliary voltage detector (AVD) with interrupt capability for implementing safe power-down procedures
  • Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
  • PLL for 2x frequency multiplication
  • Clock-out capability
  • 4 Power Saving Modes: Halt, Active Halt,Wait and Slow
• Interrupt Management
  • Nested interrupt controller
  • 10 interrupt vectors plus TRAP and RESET
  • 22 external interrupt lines (on 2 vectors)
• 22 I/O Ports
  • 22 multifunctional bidirectional I/O lines
  • 20 alternate function lines
  • 8 high sink outputs
• 4 Timers
  • Main Clock Controller with Real time base and Clock-out capabilities
  • Configurable watchdog timer
  • Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
• 3 Communication Interfaces
  • SPI synchronous serial interface
  • I²C multimaster interface (SMBus V1.1 Compliant)
  • SCI asynchronous serial interface
• 1 Analog peripheral
  • 10-bit ADC with 6 input channels
• Instruction Set
  • 8-bit data manipulation
  • 63 basic instructions with illegal opcode detection
  • 17 main addressing modes
  • 8 x 8 unsigned multiply instruction
• Development Tools
  • Full hardware/software development package

功能框图