技术特性

• Memories
  • 8 to 32 Kbyte dual voltage High Density Flash (HDFlash) or ROM with readout protection capability. In-application programming and Incircuit programming for HDFlash devices
  • 384 bytes to 1 Kbyte RAM
  • HDFlash endurance: 1 kcycle at 55 °C, data retention 40 years at 85 °C
• Clock, reset and supply management
  • Enhanced low voltage supervisor (LVD) with programmable reset thresholds and auxiliary voltage detector (AVD) with interrupt capability
  • Clock sources: crystal/ceramic resonator oscillators, int. RC osc. and ext. clock input
  • PLL for 2x frequency multiplication
  • 4 power saving modes: Slow, Wait, Active-halt, and Halt
• Interrupt management
  • Nested interrupt controller. 10 interrupt vectors plus TRAP and RESET. 9/6 ext. interrupt lines (on 4 vectors)
• Up to 32 I/O ports
  • 32/24 multifunctional bidirectional I/Os, 22/17 alternate function lines, 12/10 high sink outputs
• 4 timers
  • Main clock controller with real-time base, Beep and clock-out capabilities
  • Configurable watchdog timer
  • 16-bit Timer A with 1 input capture, 1 output compare, ext. clock input, PWM and pulse generator modes
  • 16-bit Timer B with 2 input captures, 2 output compares, PWM and pulse generator modes
• 2 communication interfaces
  • SPI synchronous serial interface
  • SCI asynchronous serial interface
• 1 analog peripheral (low current coupling)
  • 10-bit ADC with up to 12 input ports
• Development tools
  • In-circuit testing capability

功能框图