技术特性

• Memories
  • 32K to 60K dual voltage High Density Flash (HDFlash) or ROM with read-out protection capability. In-Application Programming and In-Circuit Programming for HDFlash devices
  • 1K to 2K RAM
  • HDFlash endurance: 100 cycles, data retention: 20 years at 55˚C
• Clock, Reset And Supply Management
  • Enhanced low voltage supervisor (LVD) for main supply and auxiliary voltage detector (AVD) with interrupt capability
  • Clock sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
  • PLL for 2x frequency multiplication
  • Four power saving modes: Halt, Active-Halt, Wait and Slow
• Interrupt Management
  • Nested interrupt controller
  • 14 interrupt vectors plus TRAP and RESET
  • Top Level Interrupt (TLI) pin
  • 15 external interrupt lines (on 4 vectors)
• Up to 64 I/O Ports
  • 48 multifunctional bidirectional I/O lines
  • 34 alternate function lines
  • 16 high sink outputs
• 5 Timers
  • Main Clock Controller with: Real time base, Beep and Clock-out capabilities
  • Configurable watchdog timer
  • Two 16-bit timers with: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
  • 8-bit PWM Auto-Reload timer with: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
• 4 Communications Interfaces
  • SPI synchronous serial interface
  • SCI asynchronous serial interface
  • I²C multimaster interface (SMbus V1.1 compliant)
  • CAN interface (2.0B Passive)
• Analog periperal (low current coupling)
  • 10-bit ADC with 16 input robust input ports
• Instruction Set
  • 8-bit Data Manipulation
  • 63 Basic Instructions
  • 17 main Addressing Modes
  • 8 x 8 Unsigned Multiply Instruction
• Development Tools
  • Full hardware/software development package
  • In-Circuit Testing capability

功能框图