CD54HC194 高速 CMOS 逻辑 4 位双向通用移位寄存器
The ’HC194 and CD74HCT194 are 4-bit shift registers with Asynchronous Master Reset (MR)\. In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift right mode, and at the shift right (DSR) serial input for the shift left mode. Clearing the register is accomplished by a Low applied to the Master Reset (MR)\ pin.
|
CD54HC194 |
| Voltage Nodes(V) |
6, 5, 2 |
| Technology Family |
HC |
| Rating |
Military |
CD54HC194 特性
- Four Operating Modes
- Shift Right, Shift Left, Hold and Reset
- Synchronous Parallel or Serial Operation
- Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
- Asynchronous Master Reset
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1µA at VOL, VOH
CD54HC194 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD54HC194F |
ACTIVE |
-55 to 125 |
5.09 | 1ku |
CDIP (JT) | 16 |
1 | TUBE |
|
| CD54HC194F3A |
ACTIVE |
-55 to 125 |
5.91 | 1ku |
CDIP (JT) | 16 |
1 | TUBE |
|
CD54HC194 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD54HC194F |
TBD |
A42 |
N/A for Pkg Type |
CD54HC194F |
CD54HC194F |
| CD54HC194F3A |
TBD |
A42 |
N/A for Pkg Type |
CD54HC194F3A |
CD54HC194F3A |
CD54HC194 应用技术支持与电子电路设计开发资源下载
- CD54HC194 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
