CD54HCT166 高速 CMOS 逻辑 8 位串行输入/并行输出移位寄存器
The ’HC166 and ’HCT166 8-bit shift register is fabricated with silicon gate CMOS technology. It possesses the low power consumption of standard CMOS integrated circuits, and can operate at speeds comparable to the equivalent low power Schottky device.
The ’HCT166 is functionally and pin compatible with the standard ’LS166.
The 166 is an 8-bit shift register that has fully synchronous serial or parallel data entry selected by an active LOW Parallel Enable (PE\) input. When the PE\ is LOW one setup time before the LOW-to-HIGH clock transition, parallel data is entered into the register. When PE\ is HIGH, data is entered into the internal bit position Q0 from Serial Data Input (DS), and the remaining bits are shifted one place to the right (Q0 → Q1 → Q2, etc
| CD54HCT166 | |
| Voltage Nodes(V) | 6, 5, 2 |
| Technology Family | HCT |
| Rating | Military |
CD54HCT166 特性
- Buffered Inputs
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range . . . -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
CD54HCT166 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD54HCT166F | ACTIVE | -55 to 125 | 5.09 | 1ku | CDIP (JT) | 16 | 1 | TUBE | |
| CD54HCT166F3A | ACTIVE | -55 to 125 | 5.91 | 1ku | CDIP (JT) | 16 | 1 | TUBE |
CD54HCT166 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD54HCT166F | TBD | A42 | N/A for Pkg Type | CD54HCT166F | CD54HCT166F |
| CD54HCT166F3A | TBD | A42 | N/A for Pkg Type | CD54HCT166F3A | CD54HCT166F3A |
CD54HCT166 应用技术支持与电子电路设计开发资源下载
- CD54HCT166 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
