SN54HC595 4 位并行访问移位寄存器
The ’HC595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register
| SN54HC595 | |
| Technology Family | HC |
| Rating | Military |
SN54HC595 特性
- 8-Bit Serial-In, Parallel-Out Shift
- Wide Operating Voltage Range of 2 V to 6 V
- High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
- Low Power Consumption: 80-µA (Max) ICC
- tpd = 13 ns (Typ)
- ±6-mA Output Drive at 5 V
- Low Input Current: 1 µA (Max)
- Shift Register Has Direct Clear
SN54HC595 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54HC595J | ACTIVE | -55 to 125 | 16.23 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54HC595FK | ACTIVE | -55 to 125 | 17.37 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54HC595J | ACTIVE | -55 to 125 | 23.81 | 1ku | CDIP (J) | 16 | 1 | TUBE | |
| SNJ54HC595W | ACTIVE | -55 to 125 | 16.23 | 1ku | CFP (W) | 16 | 1 | TUBE |
SN54HC595 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54HC595J | TBD | A42 | N/A for Pkg Type | SN54HC595J | SN54HC595J |
| SNJ54HC595FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54HC595FK | SNJ54HC595FK |
| SNJ54HC595J | TBD | A42 | N/A for Pkg Type | SNJ54HC595J | SNJ54HC595J |
| SNJ54HC595W | TBD | Call TI | N/A for Pkg Type | SNJ54HC595W | SNJ54HC595W |
SN54HC595 应用技术支持与电子电路设计开发资源下载
- SN54HC595 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
