SN54LS164 4 位并行访问移位寄存器
These 8-bit shift registers feature gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.
The SN54164 and SN54LS164 are characterized for operation over the full military temperature range of -55°C to 125°
| SN54LS164 | |
| Technology Family | LS |
| Rating | Military |
SN54LS164 特性
- Gated Serial Inputs
- Fully Buffered Clock and Serial Inputs
- Asynchronous Clear
SN54LS164 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54LS164J | ACTIVE | -55 to 125 | 16.23 | 1ku | CDIP (J) | 14 | 1 | TUBE | |
| SNJ54LS164FK | ACTIVE | -55 to 125 | 17.37 | 1ku | LCCC (FK) | 20 | 1 | TUBE | |
| SNJ54LS164J | ACTIVE | -55 to 125 | 23.81 | 1ku | CDIP (J) | 14 | 1 | TUBE | |
| SNJ54LS164W | ACTIVE | -55 to 125 | 16.23 | 1ku | CFP (W) | 14 | 1 | TUBE |
SN54LS164 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54LS164J | TBD | A42 | N/A for Pkg Type | SN54LS164J | SN54LS164J |
| SNJ54LS164FK | TBD | POST-PLATE | N/A for Pkg Type | SNJ54LS164FK | SNJ54LS164FK |
| SNJ54LS164J | TBD | A42 | N/A for Pkg Type | SNJ54LS164J | SNJ54LS164J |
| SNJ54LS164W | TBD | Call TI | N/A for Pkg Type | SNJ54LS164W | SNJ54LS164W |
SN54LS164 应用技术支持与电子电路设计开发资源下载
- SN54LS164 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
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- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
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