
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can disable the device so that the buses are effectively isolated
| SN54LS245-SP | |
| Voltage Nodes (V) | 5 |
| Vcc range (V) | 4.5 to 5.5 |
| Input Level | TTL |
| Output Level | TTL |
| No. of Outputs | 8 |
| Logic | True |
| Rating | Space |
| 器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 5962-8002101VRA | ACTIVE | -55 to 125 | 89.45 | 100u | CDIP (J) | 20 | 1 | TUBE | |
| 5962-8002101VSA | ACTIVE | -55 to 125 | 130.55 | 100u | CFP (W) | 20 | 1 | TUBE |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 5962-8002101VRA | TBD | A42 | N/A for Pkg Type | 5962-8002101VRA | 5962-8002101VRA |
| 5962-8002101VSA | TBD | Call TI | N/A for Pkg Type | 5962-8002101VSA | 5962-8002101VSA |