SN54LS257B-SP 四路 2 线路到 1 线路数据选择器/多路复用器

These devices are designed to multiplex signals from four-bit data sources to four-output data lines in bus-organized systems. The 3-state outputs will not load the data lines when the output control pin (G\) is at a high-logic level.

Series 54LS and 54S are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74LS and 74S are characterized for operation from 0°C to 70°C

SN54LS257B-SP
Rating Military  
Technology Family LS
SN54LS257B-SP 特性
SN54LS257B-SP 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
5962-7603701VEA ACTIVE -55 to 125 142.98 | 1ku CDIP (J) | 16 1 | TUBE  
5962-7603701VFA ACTIVE -55 to 125 142.98 | 1ku CDIP (J) | 16 1 | TUBE  
SN54LS257B-SP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
5962-7603701VEA TBD  A42   N/A for Pkg Type 5962-7603701VEA 5962-7603701VEA
5962-7603701VFA TBD  A42   N/A for Pkg Type 5962-7603701VFA 5962-7603701VFA
SN54LS257B-SP 应用技术支持与电子电路设计开发资源下载
  1. SN54LS257B-SP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)