SN54LVTH244A-SP 具有清零和预设功能的双路上升沿 D 类触发器

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the devices pass data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level

SN54LVTH244A-SP
Voltage Nodes (V) 3.3, 2.7    
Vcc range (V) 2.7 to 3.6    
Output Drive (mA) -24/48    
No. of Gates 8    
No. of Outputs 8    
tpd max (ns) 4.7    
Static Current 14    
Rating Space    
Technology Family LVT
SN54LVTH244A-SP 特性
SN54LVTH244A-SP 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
5962-9584401V2A ACTIVE -55 to 125 142.98 | 100u LCCC (FK) | 20 1 | TUBE  
5962-9584401VRA ACTIVE -55 to 125 137.90 | 100u CDIP (J) | 20 1 | TUBE  
5962-9584401VSA ACTIVE -55 to 125 179.00 | 100u CFP (W) | 20 1 | TUBE  
SN54LVTH244A-SP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
5962-9584401V2A TBD   POST-PLATE   N/A for Pkg Type 5962-9584401V2A 5962-9584401V2A
5962-9584401VRA TBD   A42   N/A for Pkg Type 5962-9584401VRA 5962-9584401VRA
5962-9584401VSA TBD   Call TI   N/A for Pkg Type 5962-9584401VSA 5962-9584401VSA
SN54LVTH244A-SP 应用技术支持与电子电路设计开发资源下载
  1. SN54LVTH244A-SP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)