
These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
These devices are designed for asynchronous communication between data buses. They transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the devices so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
| SN54LVTH245A-SP | |
| Voltage Nodes (V) | 3.3,2.7,2.5,1.8 |
| Vcc range (V) | 2.0 to 3.6 |
| Input Level | 0.0 to 5.5 |
| Output Level | LVTTL |
| Output Drive (mA) | 24 |
| No. of Outputs | 8 |
| No. of Bits | 8 |
| Static Current | 0.01 |
| tpd max (ns) | 7.4 |
| Technology Family | LVC |
| Rating | Space |
| 器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 5962-9564201V2A | ACTIVE | -55 to 125 | 143.04 | 100u | LCCC (FK) | 20 | 1 | TUBE | |
| 5962-9564201VRA | ACTIVE | -55 to 125 | 138.00 | 100u | CDIP (J) | 20 | 1 | TUBE | |
| 5962-9564201VSA | ACTIVE | -55 to 125 | 179.05 | 100u | CFP (W) | 20 | 1 | TUBE |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 5962-9564201V2A | TBD | POST-PLATE | N/A for Pkg Type | 5962-9564201V2A | 5962-9564201V2A |
| 5962-9564201VRA | TBD | A42 | N/A for Pkg Type | 5962-9564201VRA | 5962-9564201VRA |
| 5962-9564201VSA | TBD | Call TI | N/A for Pkg Type | 5962-9564201VSA | 5962-9564201VSA |