SN54S00 四路 2 输入正与非门
These devices contain four independent 2-input-NAND gates. The devices perform the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic.
| SN54S00 | |
| Rating | Military |
| Technology Family | S |
SN54S00 特性
- Package Options Include Plastic Small-Outline (D, NS, PS), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs
- Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
SN54S00 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN54S00J | ACTIVE | -55 to 125 | 3.92 | 1ku | CDIP (J) | 14 | 1 | TUBE | SN54S00J |
| SNJ54S00J | ACTIVE | -55 to 125 | 4.64 | 1ku | CDIP (J) | 14 | 1 | TUBE | SNJ54S00J |
| SNJ54S00W | ACTIVE | -55 to 125 | 7.91 | 1ku | CFP (W) | 14 | 1 | TUBE | SNJ54S00W |
SN54S00 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN54S00J | TBD | A42 | N/A for Pkg Type | SN54S00J | SN54S00J |
| SNJ54S00J | TBD | A42 | N/A for Pkg Type | SNJ54S00J | SNJ54S00J |
| SNJ54S00W | TBD | A42 | N/A for Pkg Type | SNJ54S00W | SNJ54S00W |
SN54S00 应用技术支持与电子电路设计开发资源下载
- SN54S00 数据资料 dataSheet 下载.PDF
- TI 德州仪器门电路产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
