CD74ACT00 四路 2 输入与非门

The ’ACT00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function of Y = (A • B)\ or Y = A\ + B\ in positive logic.

CD74ACT00
Rating Catalog  
Technology Family AC
CD74ACT00 特性
CD74ACT00 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD74ACT00E ACTIVE -55 to 125 0.34 | 1ku PDIP (N) | 14 25 | TUBE CD74ACT00E
CD74ACT00EE4 ACTIVE -55 to 125 0.34 | 1ku PDIP (N) | 14 25 | TUBE CD74ACT00E
CD74ACT00M ACTIVE -55 to 125 0.37 | 1ku SOIC (D) | 14 50 | TUBE ACT00M
CD74ACT00M96 ACTIVE -55 to 125 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R ACT00M
CD74ACT00M96E4 ACTIVE -55 to 125 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R ACT00M
CD74ACT00M96G4 ACTIVE -55 to 125 0.31 | 1ku SOIC (D) | 14 2500 | LARGE T&R ACT00M
CD74ACT00ME4 ACTIVE -55 to 125 0.37 | 1ku SOIC (D) | 14 50 | TUBE ACT00M
CD74ACT00MG4 ACTIVE -55 to 125 0.37 | 1ku SOIC (D) | 14 50 | TUBE ACT00M
CD74ACT00 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD74ACT00E Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD74ACT00E CD74ACT00E
CD74ACT00EE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD74ACT00EE4 CD74ACT00EE4
CD74ACT00M Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00M CD74ACT00M
CD74ACT00M96 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00M96 CD74ACT00M96
CD74ACT00M96E4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00M96E4 CD74ACT00M96E4
CD74ACT00M96G4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00M96G4 CD74ACT00M96G4
CD74ACT00ME4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00ME4 CD74ACT00ME4
CD74ACT00MG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74ACT00MG4 CD74ACT00MG4
CD74ACT00 应用技术支持与电子电路设计开发资源下载
  1. CD74ACT00 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)