CD74HCT4094 具有 3 级输出的高速 CMOS 逻辑 8 级移位和存储总线寄存器
The ’HC4094and CD74HCT4094 are 8-stage serial shift registers having a storage latch associated with each stage for strobing data from the serial input to parallel buffered three-stateoutputs. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive clock transitions. The data in each shift register stage is transferred to the storage register when the Strobe input is high. Data in the storage register appears at the outputs whenever the Output-Enable signal is high.
Two serial outputs are available for cascading a number of these devices. Data is available at the QS1 serial output terminal on positive clock edges to allow for high-speed operation in cascaded system in which the clock rise time is fast
| CD74HCT4094 | |
| Technology Family | HCT |
| Rating | Catalog |
CD74HCT4094 特性
- Buffered Inputs
- Separate Serial Outputs Synchronous to Both Positive and Negative Clock Edges For Cascading
- Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . .–55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
CD74HCT4094 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD74HCT4094E | ACTIVE | -55 to 125 | 0.39 | 1ku | PDIP (N) | 16 | 25 | TUBE | CD74HCT4094E |
| CD74HCT4094EE4 | ACTIVE | -55 to 125 | 0.39 | 1ku | PDIP (N) | 16 | 25 | TUBE | CD74HCT4094E |
| CD74HCT4094M | ACTIVE | -55 to 125 | 0.42 | 1ku | PDIP (N) | 16 | 50 | TUBE | HCT094M |
| CD74HCT4094ME4 | ACTIVE | -55 to 125 | 0.42 | 1ku | PDIP (N) | 16 | 50 | TUBE | HCT094M |
| CD74HCT4094MG4 | ACTIVE | -55 to 125 | 0.42 | 1ku | PDIP (N) | 16 | 50 | TUBE | HCT094M |
CD74HCT4094 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD74HCT4094E | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HCT4094E | CD74HCT4094E |
| CD74HCT4094EE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HCT4094EE4 | CD74HCT4094EE4 |
| CD74HCT4094M | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT4094M | CD74HCT4094M |
| CD74HCT4094ME4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT4094ME4 | CD74HCT4094ME4 |
| CD74HCT4094MG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT4094MG4 | CD74HCT4094MG4 |
CD74HCT4094 应用技术支持与电子电路设计开发资源下载
- CD74HCT4094 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
