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CD74HCT74 具有设置和复位功能的高速 CMOS 逻辑双路上升沿 D 类触发器

The ’HC74 and ’HCT74 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

This flip-flop has independent DATA, SET\, RESET\ and CLOCK inputs and Q and Q\ outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. SET\ and RESET\ are independent of the clock and are accomplished by a low level at the appropriate input.

The HCT logic family is functionally as well as pin compatible with the standard LS logic family

	CD74HCT74
Technology Family	AC
Rating	Catalog

CD74HCT74 特性

• Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
• Asynchronous Set and Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25°C
• Fanout (Over Temperature Range)
  • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . –55°C to 125°C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  • 2V to 6V Operation
  • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
  • CMOS Input Compatibility, Il 1µA at VOL, VOH

CD74HCT74 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
CD74HCT74E	ACTIVE	-55 to 125	0.55 | 1ku	PDIP (N) | 14	25 | TUBE
CD74HCT74EE4	ACTIVE	-55 to 125	0.55 | 1ku	PDIP (N) | 14	25 | TUBE
CD74HCT74M	ACTIVE	-55 to 125	0.48 | 1ku	SOIC (D) | 14	40 | TUBE
CD74HCT74M96	ACTIVE	-55 to 125	0.40 | 1ku	SOIC (D) | 14	2500 | LARGE T&R
CD74HCT74M96E4	ACTIVE	-55 to 125	0.40 | 1ku	SOIC (D) | 14	2500 | LARGE T&R
CD74HCT74M96G4	ACTIVE	-55 to 125	0.40 | 1ku	SOIC (D) | 14	2500 | LARGE T&R
CD74HCT74ME4	ACTIVE	-55 to 125	0.48 | 1ku	SOIC (D) | 14	40 | TUBE
CD74HCT74MG4	ACTIVE	-55 to 125	0.48 | 1ku	SOIC (D) | 14	40 | TUBE

CD74HCT74 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
CD74HCT74E	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD74HCT74E	CD74HCT74E
CD74HCT74EE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	CD74HCT74EE4	CD74HCT74EE4
CD74HCT74M	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74M	CD74HCT74M
CD74HCT74M96	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74M96	CD74HCT74M96
CD74HCT74M96E4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74M96E4	CD74HCT74M96E4
CD74HCT74M96G4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74M96G4	CD74HCT74M96G4
CD74HCT74ME4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74ME4	CD74HCT74ME4
CD74HCT74MG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	CD74HCT74MG4	CD74HCT74MG4

CD74HCT74 应用技术支持与电子电路设计开发资源下载

1. CD74HCT74 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)