CY74FCT162952AT 具有三态输出的 16 位寄存收发器
CY74FCT162952AT 描述
The CY74FCT162952AT and CY74FCT162952AT consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with these devices.
Output-enable (OE\) and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data
CY74FCT162952AT 特性
- 2-V to 6-V VCC Operation (CY74FCT162952AT)
- 4.5-V to 5.5-V VCC Operation (CY74FCT162952AT)
- Wide Operating Temperature Range of –55°C to 125°C
- Balanced Propagation Delays and Transition Times
- Standard Outputs Drive Up To 15 LS-TTL Loads
- Significant Power Reduction Compared to LS-TTL Logic ICs
- Inputs Are TTL-Voltage Compatible (CY74FCT162952AT)
- Independent Registers for A and B Buses
- Multiplexed Real-Time and Stored Data
- True Data Paths
CY74FCT162952AT 应用技术支持与电子电路设计开发资源下载
- CY74FCT162952AT 数据资料 dataSheet 下载.PDF
- TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
- CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
- Semiconductor Packing Methodology (PDF 3005 KB)
- 逻辑产品选择指南 2006/2007 （修订版 Z）(4462KB)
- 标准线性和逻辑产品 5 分钟指南 (786KB)
- 了解和解释标准逻辑数据表
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
