CY74FCT2573CT 具有三态输出和串联阻尼电阻的八路 D 类透明锁存器
The CY74FCT2573T is an 8-bit, high-speed CMOS, TTL-compatible buffered latch with 3-state outputs that is ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25-
termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2573T can replace the CY74FCT573T to reduce noise in an existing design.
When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches
| CY74FCT2573CT | |
| Voltage Nodes(V) | 5 |
| Rating | Catalog |
CY74FCT2573CT 特性
- Function and Pinout Compatible With the Fastest Bipolar Logic
- 25- Output Series Resistors Reduce Transmission-Line Reflection Noise
- Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- 3-State Outputs
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Fully Compatible With TTL Input and Output Logic Levels
- 12-mA Output Sink Current
15-mA Output Source Current
CY74FCT2573CT 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CY74FCT2573CTPWR | ACTIVE | -40 to 85 | 0.70 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| CY74FCT2573CTPWRE4 | ACTIVE | -40 to 85 | 0.70 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| CY74FCT2573CTPWRG4 | ACTIVE | -40 to 85 | 0.70 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| CY74FCT2573CTQCT | ACTIVE | -40 to 85 | 1.10 | 1ku | SSOP/QSOP (DBQ) | 20 | 2500 | LARGE T&R | |
| CY74FCT2573CTQCTE4 | ACTIVE | -40 to 85 | 1.10 | 1ku | SSOP/QSOP (DBQ) | 20 | 2500 | LARGE T&R | |
| CY74FCT2573CTQCTG4 | ACTIVE | -40 to 85 | 1.10 | 1ku | SSOP/QSOP (DBQ) | 20 | 2500 | LARGE T&R |
CY74FCT2573CT 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CY74FCT2573CTPWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTPWR | CY74FCT2573CTPWR |
| CY74FCT2573CTPWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTPWRE4 | CY74FCT2573CTPWRE4 |
| CY74FCT2573CTPWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTPWRG4 | CY74FCT2573CTPWRG4 |
| CY74FCT2573CTQCT | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTQCT | CY74FCT2573CTQCT |
| CY74FCT2573CTQCTE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTQCTE4 | CY74FCT2573CTQCTE4 |
| CY74FCT2573CTQCTG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CY74FCT2573CTQCTG4 | CY74FCT2573CTQCTG4 |
CY74FCT2573CT 应用技术支持与电子电路设计开发资源下载
- CY74FCT2573CT 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
