SN74ABT533A 具有三态输出的八路透明 D 类锁存器
These octal transparent D-type latches with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse of the levels at the D inputs.
A buffered output-enable (
) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly
| SN74ABT533A | |
| Voltage Nodes(V) | 5 |
| Technology Family | ABT |
| Rating | Catalog |
SN74ABT533A 特性
- State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
- High-Drive Outputs (-32-mA IOH, 64-mA IOL)
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package
SN74ABT533A 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74ABT533ADBLE | OBSOLETE | -40 to 85 | SSOP (DB) | 20 | |||
| SN74ABT533ADBR | ACTIVE | -40 to 85 | 0.40 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ADBRE4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ADBRG4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ADW | ACTIVE | -40 to 85 | 0.43 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74ABT533ADWE4 | ACTIVE | -40 to 85 | 0.43 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74ABT533ADWG4 | ACTIVE | -40 to 85 | 0.43 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74ABT533ADWR | ACTIVE | -40 to 85 | 0.36 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ADWRE4 | ACTIVE | -40 to 85 | 0.36 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ADWRG4 | ACTIVE | -40 to 85 | 0.36 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74ABT533AN | ACTIVE | -40 to 85 | 0.40 | 1ku | PDIP (N) | 20 | 20 | TUBE | |
| SN74ABT533ANE4 | ACTIVE | -40 to 85 | 0.40 | 1ku | PDIP (N) | 20 | 20 | TUBE | |
| SN74ABT533ANSR | ACTIVE | -40 to 85 | 0.40 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ANSRE4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74ABT533ANSRG4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74ABT533APW | ACTIVE | -40 to 85 | 0.43 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74ABT533APWE4 | ACTIVE | -40 to 85 | 0.43 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74ABT533APWG4 | ACTIVE | -40 to 85 | 0.43 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74ABT533APWLE | OBSOLETE | -40 to 85 | TSSOP (PW) | 20 | |||
| SN74ABT533APWR | ACTIVE | -40 to 85 | 0.36 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| SN74ABT533APWRE4 | ACTIVE | -40 to 85 | 0.36 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| SN74ABT533APWRG4 | ACTIVE | -40 to 85 | 0.36 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R |
SN74ABT533A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74ABT533ADBR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADBR | SN74ABT533ADBR |
| SN74ABT533ADBRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADBRE4 | SN74ABT533ADBRE4 |
| SN74ABT533ADBRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADBRG4 | SN74ABT533ADBRG4 |
| SN74ABT533ADW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADW | SN74ABT533ADW |
| SN74ABT533ADWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADWE4 | SN74ABT533ADWE4 |
| SN74ABT533ADWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADWG4 | SN74ABT533ADWG4 |
| SN74ABT533ADWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADWR | SN74ABT533ADWR |
| SN74ABT533ADWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADWRE4 | SN74ABT533ADWRE4 |
| SN74ABT533ADWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ADWRG4 | SN74ABT533ADWRG4 |
| SN74ABT533AN | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74ABT533AN | SN74ABT533AN |
| SN74ABT533ANE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74ABT533ANE4 | SN74ABT533ANE4 |
| SN74ABT533ANSR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ANSR | SN74ABT533ANSR |
| SN74ABT533ANSRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ANSRE4 | SN74ABT533ANSRE4 |
| SN74ABT533ANSRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533ANSRG4 | SN74ABT533ANSRG4 |
| SN74ABT533APW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APW | SN74ABT533APW |
| SN74ABT533APWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APWE4 | SN74ABT533APWE4 |
| SN74ABT533APWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APWG4 | SN74ABT533APWG4 |
| SN74ABT533APWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APWR | SN74ABT533APWR |
| SN74ABT533APWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APWRE4 | SN74ABT533APWRE4 |
| SN74ABT533APWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ABT533APWRG4 | SN74ABT533APWRG4 |
SN74ABT533A 应用技术支持与电子电路设计开发资源下载
- SN74ABT533A 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
