SN74ALS841 具有三态输出的 10 位总线接口 D 类锁存器
These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.
A buffered output-enable (
) input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
| SN74ALS841 | |
| Voltage Nodes(V) | 5 |
| Technology Family | ABT |
| Rating | Catalog |
SN74ALS841 特性
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
- Buffered Control Inputs to Reduce dc Loading Effects
- Power-Up High-Impedance State
- Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs
SN74ALS841 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74ALS841DW | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS841DWE4 | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS841DWG4 | ACTIVE | 0 to 70 | 12.00 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74ALS841DWR | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS841DWRE4 | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS841DWRG4 | ACTIVE | 0 to 70 | 10.00 | 1ku | SOIC (DW) | 24 | 2000 | LARGE T&R | |
| SN74ALS841NT | ACTIVE | 0 to 70 | 11.35 | 1ku | PDIP (NT) | 24 | 15 | TUBE | |
| SN74ALS841NTE4 | ACTIVE | 0 to 70 | 11.35 | 1ku | PDIP (NT) | 24 | 15 | TUBE |
SN74ALS841 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74ALS841DW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DW | SN74ALS841DW |
| SN74ALS841DWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DWE4 | SN74ALS841DWE4 |
| SN74ALS841DWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DWG4 | SN74ALS841DWG4 |
| SN74ALS841DWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DWR | SN74ALS841DWR |
| SN74ALS841DWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DWRE4 | SN74ALS841DWRE4 |
| SN74ALS841DWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841DWRG4 | SN74ALS841DWRG4 |
| SN74ALS841NT | Pb-Free (RoHS) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841NT | SN74ALS841NT |
| SN74ALS841NTE4 | Pb-Free (RoHS) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALS841NTE4 | SN74ALS841NTE4 |
SN74ALS841 应用技术支持与电子电路设计开发资源下载
- SN74ALS841 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
