SN74ALVC00 六路 2 输入与非驱动器

This quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVC00 performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic

SN74ALVC00
Rating Catalog
Technology Family ALVC  
SN74ALVC00 特性
SN74ALVC00 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74ALVC00D ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 50 | TUBE 74ALVC00
SN74ALVC00DE4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 50 | TUBE 74ALVC00
SN74ALVC00DG4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 50 | TUBE 74ALVC00
SN74ALVC00DR ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R 74ALVC00
SN74ALVC00DRE4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R 74ALVC00
SN74ALVC00DRG4 ACTIVE -40 to 85 0.20 | 1ku SOIC (D) | 14 2500 | LARGE T&R 74ALVC00
SN74ALVC00N ACTIVE 0 to 70 0.95 | 1ku PDIP (N) | 14 20 | TUBE SN74ALVC00N
SN74ALVC00NE4 ACTIVE 0 to 70 0.95 | 1ku PDIP (N) | 14 20 | TUBE SN74ALVC00N
SN74ALVC00 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74ALVC00D Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00D SN74ALVC00D
SN74ALVC00DE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00DE4 SN74ALVC00DE4
SN74ALVC00DG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00DG4 SN74ALVC00DG4
SN74ALVC00DR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00DR SN74ALVC00DR
SN74ALVC00DRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00DRE4 SN74ALVC00DRE4
SN74ALVC00DRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74ALVC00DRG4 SN74ALVC00DRG4
SN74ALVC00N Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74ALVC00N SN74ALVC00N
SN74ALVC00NE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74ALVC00NE4 SN74ALVC00NE4
SN74ALVC00 应用技术支持与电子电路设计开发资源下载
  1. SN74ALVC00 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)