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SN74ALVCH162721 具有三态输出的 3.3V 20 位触发器

This 20-bit flip-flop is designed for low-voltage 1.65-V to 3.6-V VCC operation.

The 20 flip-flops of the SN74ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the clock-enable (CLKEN)\ input is low. If CLKEN\ is high, no data is stored.

A buffered output-enable (OE)\ input places the 20 outputs in either a normal logic state (high or low level) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components

	SN74ALVCH162721
Voltage Nodes(V)	3.3, 2.7, 2.5, 1.8
Technology Family	ALVC
Rating	Catalog

SN74ALVCH162721 特性

• Member of the Texas Instruments Widebus™ Family
• EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
• Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

SN74ALVCH162721 芯片订购指南

器件	状态	温度	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
74ALVCH162721DLG4	ACTIVE	-40 to 85	4.00 | 1ku	SSOP (DL) | 56	20 | TUBE	ALVCH162721
74ALVCH162721DLRG4	ACTIVE	-40 to 85	3.40 | 1ku	SSOP (DL) | 56	1000 | LARGE T&R	ALVCH162721
74ALVCH162721GRE4	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162721
74ALVCH162721GRG4	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162721
SN74ALVCH162721DGGR	OBSOLETE	-40 to 85		TSSOP (DGG) | 56
SN74ALVCH162721DL	ACTIVE	-40 to 85	4.00 | 1ku	SSOP (DL) | 56	20 | TUBE	ALVCH162721
SN74ALVCH162721DLR	ACTIVE	-40 to 85	3.40 | 1ku	SSOP (DL) | 56	1000 | LARGE T&R	ALVCH162721
SN74ALVCH162721GR	ACTIVE	-40 to 85	3.10 | 1ku	TSSOP (DGG) | 56	2000 | LARGE T&R	ALVCH162721

SN74ALVCH162721 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
74ALVCH162721DLG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162721DLG4	74ALVCH162721DLG4
74ALVCH162721DLRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162721DLRG4	74ALVCH162721DLRG4
74ALVCH162721GRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162721GRE4	74ALVCH162721GRE4
74ALVCH162721GRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	74ALVCH162721GRG4	74ALVCH162721GRG4
SN74ALVCH162721DL	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162721DL	SN74ALVCH162721DL
SN74ALVCH162721DLR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162721DLR	SN74ALVCH162721DLR
SN74ALVCH162721GR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74ALVCH162721GR	SN74ALVCH162721GR

SN74ALVCH162721 应用技术支持与电子电路设计开发资源下载

1. SN74ALVCH162721 数据资料 dataSheet 下载.PDF
2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
8. Designing With Logic (PDF 186 KB)
9. Live Insertion (PDF 150 KB)
10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
13. LOGIC Pocket Data Book (PDF 6001 KB)
14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
15. Logic Cross-Reference (PDF 2938 KB)