SN74ALVTH16821 具有三态输出的 2.5V/3.3V 20 位总线接口触发器
The 'ALVTH16821 devices are 20-bit bus-interface flip-flops with 3-state outputs designed for 2.5-V or 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK), the flip-flops store the logic levels set up at the D inputs.
A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components
| SN74ALVTH16821 | |
| Voltage Nodes(V) | 3.3, 2.5 |
| Technology Family | ALVTLVT |
| Rating | Catalog |
SN74ALVTH16821 特性
- State-of-the-Art Advanced BiCMOS Technology (ABT) WidebusTM Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC)
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- High-Drive (-24/24 mA at 2.5-V and -32/64 mA at 3.3-V VCC)
- Power Off Disables Outputs, Permitting Live Insertion
- High-Impedance State During Power Up and Power Down Prevents Driver Conflict
- Uses Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating
- Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic Method
- Flow-Through Architecture Facilitates Printed Circuit Board Layout
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), Thin Very Small-Outline (DGV) Packages, and 380-mil Fine-Pitch Ceramic Flat (WD) Package
SN74ALVTH16821 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| 74ALVTH16821DGGRE4 | ACTIVE | -40 to 85 | 1.10 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| 74ALVTH16821DGGRG4 | ACTIVE | -40 to 85 | 1.10 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| 74ALVTH16821DGVRE4 | ACTIVE | -40 to 85 | 1.10 | 1ku | TVSOP (DGV) | 56 | 2000 | LARGE T&R | VH821 |
| 74ALVTH16821DGVRG4 | ACTIVE | -40 to 85 | 1.10 | 1ku | TVSOP (DGV) | 56 | 2000 | LARGE T&R | VH821 |
| 74ALVTH16821DLG4 | ACTIVE | -40 to 85 | 1.45 | 1ku | SSOP (DL) | 56 | 25 | TUBE | ALVCH16821 |
| 74ALVTH16821DLRG4 | ACTIVE | -40 to 85 | 1.25 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | ALVCH16821 |
| 74ALVTH16821ZQLR | ACTIVE | -40 to 85 | 1.65 | 1ku | BGA MICROSTAR JUNIOR (ZQL) | 56 | 1000 | LARGE T&R | VH821 |
| SN74ALVTH16821DGGR | ACTIVE | -40 to 85 | 1.10 | 1ku | TSSOP (DGG) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| SN74ALVTH16821DGVR | ACTIVE | -40 to 85 | 1.10 | 1ku | TVSOP (DGV) | 56 | 2000 | LARGE T&R | ALVCH16821 |
| SN74ALVTH16821DL | ACTIVE | -40 to 85 | 1.45 | 1ku | SSOP (DL) | 56 | 25 | TUBE | ALVCH16821 |
| SN74ALVTH16821DLR | ACTIVE | -40 to 85 | 1.25 | 1ku | SSOP (DL) | 56 | 1000 | LARGE T&R | ALVCH16821 |
| SN74ALVTH16821KR | NRND | -40 to 85 | 1.65 | 1ku | BGA MICROSTAR JUNIOR (GQL) | 56 | 1000 | LARGE T&R | VH821 |
SN74ALVTH16821 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| 74ALVTH16821DGGRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DGGRE4 | 74ALVTH16821DGGRE4 |
| 74ALVTH16821DGGRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DGGRG4 | 74ALVTH16821DGGRG4 |
| 74ALVTH16821DGVRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DGVRE4 | 74ALVTH16821DGVRE4 |
| 74ALVTH16821DGVRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DGVRG4 | 74ALVTH16821DGVRG4 |
| 74ALVTH16821DLG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DLG4 | 74ALVTH16821DLG4 |
| 74ALVTH16821DLRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | 74ALVTH16821DLRG4 | 74ALVTH16821DLRG4 |
| 74ALVTH16821ZQLR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | 74ALVTH16821ZQLR | 74ALVTH16821ZQLR |
| SN74ALVTH16821DGGR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVTH16821DGGR | SN74ALVTH16821DGGR |
| SN74ALVTH16821DGVR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVTH16821DGVR | SN74ALVTH16821DGVR |
| SN74ALVTH16821DL | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVTH16821DL | SN74ALVTH16821DL |
| SN74ALVTH16821DLR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74ALVTH16821DLR | SN74ALVTH16821DLR |
| SN74ALVTH16821KR | TBD | SNPB | Level-1-240C-UNLIM | SN74ALVTH16821KR | SN74ALVTH16821KR |
SN74ALVTH16821 应用技术支持与电子电路设计开发资源下载
- SN74ALVTH16821 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
