SN74CBT3253C 具有 -2V 下冲保护的双路 4 选 1 FET 多路复用器/多路解复用器
The SN74CBT3253C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT3253C provides protection for undershoot up to -2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.
The SN74CBT3253C is organized as two 1-of-4 multiplexer/demultiplexers with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. When OE is low, the associated multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated multiplexer/demultiplexer is disabled, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
| SN74CBT3253C | |
| Voltage Nodes(V) | 5 |
| Vcc range(V) | 4.0 to 5.5 |
| No. of Bits | 8 |
| ron(max)(ohms) | 12 |
| tpd max(ns) | 0.15 |
| Rating | Catalog |
| Technology Family | CBT-C |
SN74CBT3253C 特性
- SN74CBT3253C Functionally Identical toIndustry-Standard ’3253 Function
- Undershoot Protection for Off-Isolation on A and B Ports up to -2 V
- Bidirectional Data Flow, With Near-Zero Propagation Delay
- Low ON-State Resistance (ron) Characteristics (ron = 3
Typical)
- Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)
- Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption (ICC = 3 µA Max)
- VCC Operating Range From 4 V to 5.5 V
- Data I/Os Support 0 to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
- Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports I2C Bus Expansion
- Supports Both Digital and Analog Applications: USB Interface, Bus Isolation, Low-Distortion Signal Gating
SN74CBT3253C 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74CBT3253CD | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| SN74CBT3253CDE4 | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| SN74CBT3253CDG4 | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| SN74CBT3253CDR | ACTIVE | -40 to 85 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| SN74CBT3253CDRE4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| SN74CBT3253CDRG4 | ACTIVE | -40 to 85 | 0.40 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R |
SN74CBT3253C 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74CBT3253CD | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CD | SN74CBT3253CD |
| SN74CBT3253CDE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CDE4 | SN74CBT3253CDE4 |
| SN74CBT3253CDG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CDG4 | SN74CBT3253CDG4 |
| SN74CBT3253CDR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CDR | SN74CBT3253CDR |
| SN74CBT3253CDRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CDRE4 | SN74CBT3253CDRE4 |
| SN74CBT3253CDRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74CBT3253CDRG4 | SN74CBT3253CDRG4 |
SN74CBT3253C 应用技术支持与电子电路设计开发资源下载
- SN74CBT3253C 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
