SN74HCT573 具有三态输出的八路透明 D 类锁存器

These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The ’HCT573 devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly

SN74HCT573
Voltage Nodes(V) 5
Rating Catalog
SN74HCT573 特性
SN74HCT573 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74HCT573DW ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HCT573DWE4 ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HCT573DWG4 ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HCT573DWR ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HCT573DWRE4 ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HCT573DWRG4 ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HCT573N ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 20 20 | TUBE  
SN74HCT573N3 OBSOLETE 0 to 70   PDIP (N) | 20    
SN74HCT573NE4 ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 20 20 | TUBE  
SN74HCT573NSR ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HCT573NSRE4 ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HCT573NSRG4 ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HCT573 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74HCT573DW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DW SN74HCT573DW
SN74HCT573DWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DWE4 SN74HCT573DWE4
SN74HCT573DWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DWG4 SN74HCT573DWG4
SN74HCT573DWR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DWR SN74HCT573DWR
SN74HCT573DWRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DWRE4 SN74HCT573DWRE4
SN74HCT573DWRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573DWRG4 SN74HCT573DWRG4
SN74HCT573N Pb-Free (RoHS)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573N SN74HCT573N
SN74HCT573NE4 Pb-Free (RoHS)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573NE4 SN74HCT573NE4
SN74HCT573NSR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573NSR SN74HCT573NSR
SN74HCT573NSRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573NSRE4 SN74HCT573NSRE4
SN74HCT573NSRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HCT573NSRG4 SN74HCT573NSRG4
SN74HCT573 应用技术支持与电子电路设计开发资源下载
  1. SN74HCT573 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)