These devices each contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state ('LS595) or open-collector ('LS596) outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading.
Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register
SN74LS596 | |
Technology Family | LS |
Rating | Catalog |
器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
SN74LS596D | ACTIVE | 0 to 70 | 3.20 | 1ku | SOIC (DW) | 16 | 25 | TUBE | |
SN74LS596N | ACTIVE | 0 to 70 | 2.90 | 1ku | PDIP (N) | 16 | 20 | TUBE | |
SN74LS596NE4 | ACTIVE | 0 to 70 | 2.90 | 1ku | PDIP (N) | 16 | 20 | TUBE |
器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
SN74LS596D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LS596D | SN74LS596D |
SN74LS596N | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74LS596N | SN74LS596N |
SN74LS596N3 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | SN74LS596NE3 | SN74LS596N3 |
SN74LS596NE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LS596NE4 | SN74LS596NE4 |