SN74LV4052A-Q1 汽车类双路 4 通道模拟多路复用器/多路解复用器
These dual 4-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V VCC operation.
The ’LV4052A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems
| SN74LV4052A-Q1 | |
| Number of Channels | 4 |
| Configuration | 2 X 1:4 MUX |
| ron(max)(ohms) | 100 |
| ICC(uA) | 20 |
| tpd max(ns) | 8 |
| Technology Family | LV-A |
| Vcc range(V) | 2.0 to 5.5 |
| Voltage Nodes(V) | 5, 3.3, 2.5 |
| IL OFF(Max)(nA) | +/-1000 |
| RON Mis-match(Max)(Ohms) | 20 |
| ON Time(Max)(ns) | 18 |
| OFF Time(Max)(ns) | 18 |
| Rating | Automotive |
| Pin/Package | 16SOIC, 16TSSOP |
| Approx. Price (US$) | 0.25 | 1ku |
| Operating Temperature Range(°C) | -40 to 105 |
SN74LV4052A-Q1 特性
- Qualified for Automotive Applications
- Supports Mixed-Mode Voltage Operation on All Ports
- Fast Switching
- High On-Off Output-Voltage Ratio
- Low Crosstalk Between Switches
- Extremely Low Input Current
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LV4052A-Q1 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LV4052ATDRQ1 | ACTIVE | -40 to 105 | 0.94 | 1ku | SOIC (D) | 16 | 2500 |
SN74LV4052A-Q1 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LV4052ATDRQ1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LV4052ATDRQ1 | SN74LV4052ATDRQ1 |
SN74LV4052A-Q1 应用技术支持与电子电路设计开发资源下载
- SN74LV4052A-Q1 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
