SN74LVC841A 具有三态输出的 10 位总线接口 D 类锁存器
This 10-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC841A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.
A buffered output-enable (OE)\ input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components
| SN74LVC841A | |
| Voltage Nodes(V) | 3.3, 2.7, 2.5, 1.8 |
| Vcc range(V) | 2.0 to 3.6 |
| Input Level | TTL/CMOS |
| Output Level | LVTTL |
| Logic | True |
| No. of Outputs | 10 |
| Output Drive(mA) | -24/24 |
| Static Current | 0.01 |
| Technology Family | LVC |
| Rating | Catalog |
SN74LVC841A 特性
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 6.7 ns at 3.3 V
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C - Ioff Supports Partial-Power-Down Mode Operation
- Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LVC841A 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVC841ADBLE | OBSOLETE | -40 to 85 | SSOP (DB) | 24 | |||
| SN74LVC841ADBR | ACTIVE | -40 to 85 | 1.65 | 1ku | SSOP (DB) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADBRE4 | ACTIVE | -40 to 85 | 1.65 | 1ku | SSOP (DB) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADBRG4 | ACTIVE | -40 to 85 | 1.65 | 1ku | SSOP (DB) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADGVR | ACTIVE | -40 to 85 | 1.50 | 1ku | TVSOP (DGV) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADGVRE4 | ACTIVE | -40 to 85 | 1.50 | 1ku | TVSOP (DGV) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADGVRG4 | ACTIVE | -40 to 85 | 1.50 | 1ku | TVSOP (DGV) | 24 | 2000 | LARGE T&R | |
| SN74LVC841ADW | ACTIVE | -40 to 85 | 1.80 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74LVC841ADWE4 | ACTIVE | -40 to 85 | 1.80 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74LVC841ADWG4 | ACTIVE | -40 to 85 | 1.80 | 1ku | SOIC (DW) | 24 | 25 | TUBE | |
| SN74LVC841APW | ACTIVE | -40 to 85 | 1.80 | 1ku | TSSOP (PW) | 24 | 60 | TUBE | |
| SN74LVC841APWE4 | ACTIVE | -40 to 85 | 1.80 | 1ku | TSSOP (PW) | 24 | 60 | TUBE | |
| SN74LVC841APWG4 | ACTIVE | -40 to 85 | 1.80 | 1ku | TSSOP (PW) | 24 | 60 | TUBE | |
| SN74LVC841APWLE | OBSOLETE | -40 to 85 | TSSOP (PW) | 24 | |||
| SN74LVC841APWR | ACTIVE | -40 to 85 | 1.50 | 1ku | TSSOP (PW) | 24 | 2000 | LARGE T&R | |
| SN74LVC841APWRE4 | ACTIVE | -40 to 85 | 1.50 | 1ku | TSSOP (PW) | 24 | 2000 | LARGE T&R | |
| SN74LVC841APWRG4 | ACTIVE | -40 to 85 | 1.50 | 1ku | TSSOP (PW) | 24 | 2000 | LARGE T&R | |
| SN74LVC841APWT | ACTIVE | -40 to 85 | 1.85 | 1ku | TSSOP (PW) | 24 | 250 | SMALL T&R | |
| SN74LVC841APWTE4 | ACTIVE | -40 to 85 | 1.85 | 1ku | TSSOP (PW) | 24 | 250 | SMALL T&R | |
| SN74LVC841APWTG4 | ACTIVE | -40 to 85 | 1.85 | 1ku | TSSOP (PW) | 24 | 250 | SMALL T&R |
SN74LVC841A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVC841ADBR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADBR | SN74LVC841ADBR |
| SN74LVC841ADBRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADBRE4 | SN74LVC841ADBRE4 |
| SN74LVC841ADBRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADBRG4 | SN74LVC841ADBRG4 |
| SN74LVC841ADGVR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADGVR | SN74LVC841ADGVR |
| SN74LVC841ADGVRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADGVRE4 | SN74LVC841ADGVRE4 |
| SN74LVC841ADGVRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADGVRG4 | SN74LVC841ADGVRG4 |
| SN74LVC841ADW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADW | SN74LVC841ADW |
| SN74LVC841ADWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADWE4 | SN74LVC841ADWE4 |
| SN74LVC841ADWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841ADWG4 | SN74LVC841ADWG4 |
| SN74LVC841APW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APW | SN74LVC841APW |
| SN74LVC841APWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWE4 | SN74LVC841APWE4 |
| SN74LVC841APWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWG4 | SN74LVC841APWG4 |
| SN74LVC841APWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWR | SN74LVC841APWR |
| SN74LVC841APWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWRE4 | SN74LVC841APWRE4 |
| SN74LVC841APWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWRG4 | SN74LVC841APWRG4 |
| SN74LVC841APWT | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWT | SN74LVC841APWT |
| SN74LVC841APWTE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWTE4 | SN74LVC841APWTE4 |
| SN74LVC841APWTG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVC841APWTG4 | SN74LVC841APWTG4 |
SN74LVC841A 应用技术支持与电子电路设计开发资源下载
- SN74LVC841A 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
