SN74LVC86A-EP 增强型产品四路 2 输入异或门

The SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V VCC operation.

The device performs the Boolean function Y = A B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment

SN74LVC86A-EP
Technology Family LVC
SN74LVC86A-EP 特性
SN74LVC86A-EP 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LVC86AMDREP ACTIVE -55 to 125 0.51 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74LVC86AQDREP ACTIVE -40 to 125 0.28 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74LVC86AQPWREP ACTIVE -40 to 125 0.28 | 1ku TSSOP (PW) | 14 2000 | LARGE T&R  
V62/04670-01XE ACTIVE -40 to 125 0.28 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
V62/04670-01YE ACTIVE -40 to 125 0.28 | 1ku TSSOP (PW) | 14 2000 | LARGE T&R  
V62/04670-02XE ACTIVE -55 to 125 0.51 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
SN74LVC86A-EP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LVC86AMDREP Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVC86AMDREP SN74LVC86AMDREP
SN74LVC86AQDREP Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVC86AQDREP SN74LVC86AQDREP
SN74LVC86AQPWREP Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVC86AQPWREP SN74LVC86AQPWREP
V62/04670-01XE Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM V62/04670-01XE V62/04670-01XE
V62/04670-01YE Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM V62/04670-01YE V62/04670-01YE
V62/04670-02XE Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM V62/04670-02XE V62/04670-02XE
SN74LVC86A-EP 应用技术支持与电子电路设计开发资源下载
  1. SN74LVC86A-EP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器门电路产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)