SN74LVT125 具有三态输出的 3.3V ABT 四路总线缓冲器
SN74LVT125 描述
This bus buffer is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance state when the associated output-enable (OE)\ input is high.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
| SN74LVT125 | |
| Voltage Nodes(V) | 3.3, 2.7 |
| Vcc range(V) | 2.7 to 3.6 |
| Logic | True |
| Input Level | TTL/CMOS |
| Output Level | LVTTL |
| Output Drive(mA) | -32/64 |
| No. of Outputs | 4 |
| tpd max(ns) | 4 |
| Static Current | 3.6 |
| Rating | Catalog |
| Technology Family | LVT |
SN74LVT125 特性
- Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Supports Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Partial-Power-Down Mode Operation
- Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
- Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN74LVT125 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVT125D | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 50 | TUBE | LVT125 |
| SN74LVT125DE4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 50 | TUBE | LVT125 |
| SN74LVT125DG4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 50 | TUBE | LVT125 |
SN74LVT125 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVT125D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVT125D | SN74LVT125D |
| SN74LVT125DE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVT125DE4 | SN74LVT125DE4 |
| SN74LVT125DG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVT125DG4 | SN74LVT125DG4 |
SN74LVT125 应用技术支持与电子电路设计开发资源下载
- SN74LVT125 数据资料 dataSheet 下载.PDF
- TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
- CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
- Semiconductor Packing Methodology (PDF 3005 KB)
- 逻辑产品选择指南 2006/2007 （修订版 Z）(4462KB)
- 标准线性和逻辑产品 5 分钟指南 (786KB)
- 了解和解释标准逻辑数据表
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
