SN74LVTH574 具有三态输出的 3.3V ABT 八路边沿 D 类触发器
These octal flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The eight flip-flops of the ’LVTH574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components
| SN74LVTH574 | |
| Voltage Nodes(V) | 3.3, 2.7 |
| Vcc range(V) | 2.7 to 3.6 |
| Input Level | TTL/CMOS |
| Output Level | LVTTL |
| Output Drive(mA) | -32/+64 |
| No. of Outputs | |
| No. of Bits | 8 |
| Static Current | 5 |
| Logic | True |
| Technology Family | LVT |
| Rating | Catalog |
SN74LVTH574 特性
- Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Support Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
SN74LVTH574 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LVTH574DBLE | OBSOLETE | -40 to 85 | SSOP (DB) | 20 | |||
| SN74LVTH574DBR | ACTIVE | -40 to 85 | 0.55 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574DBRE4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574DBRG4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SSOP (DB) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574DW | ACTIVE | -40 to 85 | 0.60 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74LVTH574DWE4 | ACTIVE | -40 to 85 | 0.60 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74LVTH574DWG4 | ACTIVE | -40 to 85 | 0.60 | 1ku | SOIC (DW) | 20 | 25 | TUBE | |
| SN74LVTH574DWR | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574DWRE4 | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574DWRG4 | ACTIVE | -40 to 85 | 0.48 | 1ku | SOIC (DW) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574NSR | ACTIVE | -40 to 85 | 0.55 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574NSRE4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574NSRG4 | ACTIVE | -40 to 85 | 0.55 | 1ku | SO (NS) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574PW | ACTIVE | -40 to 85 | 0.60 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74LVTH574PWE4 | ACTIVE | -40 to 85 | 0.60 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74LVTH574PWG4 | ACTIVE | -40 to 85 | 0.60 | 1ku | TSSOP (PW) | 20 | 70 | TUBE | |
| SN74LVTH574PWLE | OBSOLETE | -40 to 85 | TSSOP (PW) | 20 | |||
| SN74LVTH574PWR | ACTIVE | -40 to 85 | 0.48 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574PWRE4 | ACTIVE | -40 to 85 | 0.48 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R | |
| SN74LVTH574PWRG4 | ACTIVE | -40 to 85 | 0.48 | 1ku | TSSOP (PW) | 20 | 2000 | LARGE T&R |
SN74LVTH574 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LVTH574DBR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DBR | SN74LVTH574DBR |
| SN74LVTH574DBRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DBRE4 | SN74LVTH574DBRE4 |
| SN74LVTH574DBRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DBRG4 | SN74LVTH574DBRG4 |
| SN74LVTH574DW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DW | SN74LVTH574DW |
| SN74LVTH574DWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DWE4 | SN74LVTH574DWE4 |
| SN74LVTH574DWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DWG4 | SN74LVTH574DWG4 |
| SN74LVTH574DWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DWR | SN74LVTH574DWR |
| SN74LVTH574DWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DWRE4 | SN74LVTH574DWRE4 |
| SN74LVTH574DWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574DWRG4 | SN74LVTH574DWRG4 |
| SN74LVTH574NSR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574NSR | SN74LVTH574NSR |
| SN74LVTH574NSRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574NSRE4 | SN74LVTH574NSRE4 |
| SN74LVTH574NSRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574NSRG4 | SN74LVTH574NSRG4 |
| SN74LVTH574PW | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PW | SN74LVTH574PW |
| SN74LVTH574PWE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PWE4 | SN74LVTH574PWE4 |
| SN74LVTH574PWG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PWG4 | SN74LVTH574PWG4 |
| SN74LVTH574PWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PWR | SN74LVTH574PWR |
| SN74LVTH574PWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PWRE4 | SN74LVTH574PWRE4 |
| SN74LVTH574PWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LVTH574PWRG4 | SN74LVTH574PWRG4 |
SN74LVTH574 应用技术支持与电子电路设计开发资源下载
- SN74LVTH574 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
