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SN74S10 三路 3 输入正与非门

These devices contain three independent 3-input NAND gates.

The SN5410, SN54LS10, and SN54S10 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN7410, SN74LS10 and SN74S10 are characterized for operation from 0°C to 70°C

	SN74S10
Rating	Catalog
Technology Family	LS

SN74S10 特性

• Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
• Dependable Texas Instruments Quality and Reliability

SN74S10 芯片订购指南

器件	状态	温度	价格	封装 | 引脚	封装数量 | 封装载体	丝印标记
SN74S10D	ACTIVE	-40 to 85	0.20 | 1ku	SOIC (D) | 14	50 | TUBE	74S10
SN74S10DE4	ACTIVE	-40 to 85	0.20 | 1ku	SOIC (D) | 14	50 | TUBE	74S10
SN74S10DG4	ACTIVE	-40 to 85	0.20 | 1ku	SOIC (D) | 14	50 | TUBE	74S10
SN74S10DR	ACTIVE	0 to 70	0.26 | 1ku	SOIC (D) | 14	2500 | LARGE T&R	74S10
SN74S10DRE4	ACTIVE	0 to 70	0.26 | 1ku	SOIC (D) | 14	2500 | LARGE T&R	74S10
SN74S10DRG4	ACTIVE	0 to 70	0.26 | 1ku	SOIC (D) | 14	2500 | LARGE T&R	74S10
SN74S10N	ACTIVE	0 to 70	0.95 | 1ku	PDIP (N) | 14	20 | TUBE	SN74S10N
SN74S10NE4	ACTIVE	0 to 70	0.95 | 1ku	PDIP (N) | 14	20 | TUBE	SN74S10N

SN74S10 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
SN74S10D	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74S10D	SN74S10D
SN74S10DE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74S10DE4	SN74S10DE4
SN74S10DR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74S10DR	SN74S10DR
SN74S10DRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	SN74S10DRE4	SN74S10DRE4
SN74S10N	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74S10N	SN74S10N
SN74S10NE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	SN74S10NE4	SN74S10NE4

SN74S10 应用技术支持与电子电路设计开发资源下载

1. SN74S10 数据资料 dataSheet 下载.PDF
2. TI 德州仪器门电路产品选型与价格 . xls
3. Logic Guide 2009 (PDF 4263 KB)
4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
9. Designing With Logic (PDF 186 KB)
10. Live Insertion (PDF 150 KB)
11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
14. LOGIC Pocket Data Book (PDF 6001 KB)
15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
16. Logic Cross-Reference (PDF 2938 KB)