ADS774 | ADS774H | |
Resolution(Bits) | 12 | 12 |
Sample Rate (max) | 125KSPS | 125KSPS |
Architecture | SAR | SAR |
Power Consumption(Typ)(mW) | 75 | 75 |
SINAD(dB) | 71 | 71 |
SNR(dB) | 72 | 72 |
SFDR(dB) | 78 | 78 | No Missing Codes(Bits) | 12 | 12 |
ENOB(Bits) | 11.5 | 11.5 |
Analog Voltage AV/DD(Min)(V) | 4.5 | 4.5 |
Analog Voltage AV/DD(Max)(V) | 5.5 | 5.5 |
Logic Voltage DV/DD(Min)(V) | 4.5 | 4.5 |
Logic Voltage DV/DD(Max)(V) | 5.4 | 5.4 |
Input Configuration Range | +/-5V,+/-10V,10V,20V | +/-5V,+/-10V,10V,20V |
Reference Mode | Int | INT |
Rating | Catalog | Catalog |
Pin/Package | 28PDIP, 28SOIC | 28PDIP, 28SOIC |
# Input Channels | 1 | 1 |
Operating Temperature Range(°C) | -40 to 85 |
The ADS774H is a 12-bit, successive-approximation analog-to-digital converter (ADC) that uses an innovative capacitor array (CDAC) implemented in low-power CMOS technology. This device is a drop-in replacement forthe ADS774, with internal sampling, much lower power consumption, and the ability to operate from a single +5V supply.
The ADS774H is complete with an internal clock, microprocessor interface, three-state outputs, and internal scaling resistors for input ranges of 0V to +10V, 0V to +20V, ±5V, or ±10V. The maximum throughput time is 8.5µs over the full operating temperature range, including both acquisition and conversion.
Complete user control over the internal sampling function facilitates elimination of external sample/hold amplifiers in most existing designs.
器件 | 状态 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 |
ADS774HIBDW | ACTIVE | 13.50 | 1ku | SOIC (DW) | 28 | 20 | TUBE |
ADS774HIBDWR | ACTIVE | 12.50 | 1ku | SOIC (DW) | 28 | 1000 | LARGE T&R |
ADS774HIBNT | PREVIEW | PDIP (NT) | 28 | 13 | |
ADS774HIBNTD | PREVIEW | PDIP (NTD) | 28 | 13 | |
ADS774HIDW | ACTIVE | 11.00 | 1ku | SOIC (DW) | 28 | 20 | TUBE |
ADS774HIDWR | ACTIVE | 10.00 | 1ku | SOIC (DW) | 28 | 1000 | LARGE T&R |
ADS774HINT | PREVIEW | PDIP (NT) | 28 | 13 | |
ADS774HINTD | PREVIEW | PDIP (NTD) | 28 | 13 |