CD40175B CMOS 四路 D 类触发器
Cd40175B consists of four identical D-type flip-flops. Each flip-flop has an independent DATA D input and complementary Q and Q\ outputs. The CLOCK and CLEAR inputs are common to all flip-flops. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All four flip-flops are simultaneously reset by a low level on the CLEAR input.
These devices can function as shift register elements or as T-type flip-flops for toggle and counter applications.
The CD40175B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
| CD40175B | |
| Voltage Nodes(V) | 5, 10, 15 |
| Technology Family | CD4000 |
| Rating | Military |
CD40175B 特性
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) =
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V - 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
- Output compatible with two HTL loads, two low power TTL loads, or one low power Schottky TTL load
- Functional equivalent to TTL74175
- Standardized, symmetrical output characteristics
- Applications:
- Shift registers
- Buffer/storage registers
- Pattern generators
CD40175B 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD40175BD | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD40175BDE4 | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD40175BDG4 | ACTIVE | -40 to 85 | 1.60 | 1ku | SOIC (DW) | 16 | 50 | TUBE | |
| CD40175BDR | ACTIVE | -40 to 85 | 1.35 | 1ku | SOIC (DW) | 16 | 2500 | LARGE T&R | |
| CD40175BDRE4 | ACTIVE | -40 to 85 | 1.35 | 1ku | SOIC (DW) | 16 | 2500 | LARGE T&R | |
| CD40175BDRG4 | ACTIVE | -40 to 85 | 1.35 | 1ku | SOIC (DW) | 16 | 2500 | LARGE T&R | |
| CD40175BN | ACTIVE | -40 to 85 | 1.45 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD40175BNE4 | ACTIVE | -40 to 85 | 1.45 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD40175BPWLE | OBSOLETE | -40 to 85 | TSSOP (PW) | 16 | |||
| CD40175BPWR | ACTIVE | -40 to 85 | 1.35 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R | |
| CD40175BPWRE4 | ACTIVE | -40 to 85 | 1.35 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R | |
| CD40175BPWRG4 | ACTIVE | -40 to 85 | 1.35 | 1ku | TSSOP (PW) | 16 | 2000 | LARGE T&R |
CD40175B 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD40175BD | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BD | CD40175BD |
| CD40175BDE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BDE4 | CD40175BDE4 |
| CD40175BDG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BDG4 | CD40175BDG4 |
| CD40175BDR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BDR | CD40175BDR |
| CD40175BDRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BDRE4 | CD40175BDRE4 |
| CD40175BDRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BDRG4 | CD40175BDRG4 |
| CD40175BN | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD40175BN | CD40175BN |
| CD40175BNE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD40175BNE4 | CD40175BNE4 |
| CD40175BPWR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BPWR | CD40175BPWR |
| CD40175BPWRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BPWRE4 | CD40175BPWRE4 |
| CD40175BPWRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD40175BPWRG4 | CD40175BPWRG4 |
CD40175B 应用技术支持与电子电路设计开发资源下载
- CD40175B 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
