CD4035B-MIL CMOS 4 级并行输入/并行输出移位寄存器
CD4035B is a four-stage clocked signal serial register with provision for synchronous PARALLEL inputs to each stage and SERIAL inputs to the first stage via JK\ logic. Register stages 2, 3, and 4 are coupled in a serial D flip-flop configuration when the register is in the serial mode (PARALLEL/SERIAL control low).
Parallel entry into each register stage is permitted when the PARALLEL/SERIAL control is high.
In the parallel or serial mode information is transferred on positive clock transitions.
When the TRUE/COMPLEMENT control is high, the true contents of the register are available at the output terminals. When the TRUE/COMPLEMENT control is low, the outputs are the complements of the data in the register
| CD4035B-MIL | |
| Voltage Nodes(V) | 5, 10, 15 |
| Technology Family | CD4000 |
| Rating | Catalog |
CD4035B-MIL 特性
- 4-Stage clocked shift operation
- Synchronous parallel entry on all 4 stages
- JK\ inputs on first stage
- Asynchronous True/Complement control on all outputs
- Static flip-flop operation; Master-slave configuration
- Buffered inputs and outputs
- High speed — 12 MHz (typ.) at VDD = 10 V
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications:
- Counters, Registers
- Arithmetic-unit registers
- Shift-left — shift right registers
- Serial-to-parallel/parallel-to-serial conversions
- Sequence generation
- Control circuits
- Code conversion
- Counters, Registers
CD4035B-MIL 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD4035BF | ACTIVE | -55 to 125 | 5.09 | 1ku | CDIP (JT) | 16 | 1 | TUBE | |
| CD4035BF3A | ACTIVE | -55 to 125 | 5.91 | 1ku | CDIP (JT) | 16 | 1 | TUBE |
CD4035B-MIL 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD4035BF | TBD | A42 | N/A for Pkg Type | CD4035BF | CD4035BF |
| CD4035BF3A | TBD | A42 | N/A for Pkg Type | CD4035BF3A | CD4035BF3A |
CD4035B-MIL 应用技术支持与电子电路设计开发资源下载
- CD4035B-MIL 数据资料 dataSheet 下载.PDF
- TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
