TS5A23159 1Ω 双路 SPDT 模拟开关、5V/3.3V 2 通道 2:1 多路复用器/多路解复用器
The TS5A23159 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 1.65 V to 5.5 V. The device offers low ON-state resistance and excellent ON-state resistance matching with the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to another. The device has an excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.
|
TS5A23159 |
| Configuration |
2 X SPDT |
| ron(max)(ohms) |
0.9 |
| IL OFF(Max)(nA) |
20000 |
| OFF Time(Max)(ns) |
8 |
| ON Time(Max)(ns) |
16.5 |
| Operating Temperature Range(°C) |
-40 to 85 |
| Pin/Package |
10MSOP, 10UQFN |
| Approx. Price (US$) |
0.49 | 1ku |
| VCC(Min)(V) |
5.5 |
| VCC(Max)(V) |
5.5 |
| Voltage Nodes(V) |
1.8, 1.8, 2.5, 3.0, 3.3, 5.0 |
| RON Flatness(Max)(Ohms) |
0.25 |
| Technology Family |
TS |
| ESD Rating(kV) |
2kV HBM |
| Bandwidth(MHz) |
100 |
| Charge Injection(Max)(pC) |
7 |
| RON Mis-match(Max)(Ohms) |
0.1 |
| Voltage Node(V) |
1.8, 2.5, 3.0, 3.3, 5.0 |
| Vcc max(V) |
5.5 |
| Vcc min(V) |
1.65 |
| Number of Channels |
2 |
| ICC(uA) |
0.75 |
| Rating |
Catalog |
TS5A23159 特性
- Isolation in Power-Down Mode, V+ = 0
- Specified Break-Before-Make Switching
- Low ON-State Resistance (1
)
- Control Inputs Are 5.5-V Tolerant
- Low Charge Injection
- Excellent ON-State Resistance Matching
- Low Total Harmonic Distortion (THD)
- 1.65-V to 5.5-V Single-Supply Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Applications
- Cell Phones
- PDAs
- Portable Instrumentation
- Audio and Video Signal Routing
- Low-Voltage Data-Acquisition Systems
- Communication Circuits
- Modems
TS5A23159 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TS5A23159DGSR |
ACTIVE |
-40 to 85 |
0.49 | 1ku |
MSOP (DGS) | 10 |
2500 | LARGE T&R |
|
| TS5A23159DGSRE4 |
ACTIVE |
-40 to 85 |
0.49 | 1ku |
MSOP (DGS) | 10 |
2500 | LARGE T&R |
|
| TS5A23159DGSRG4 |
ACTIVE |
-40 to 85 |
0.49 | 1ku |
MSOP (DGS) | 10 |
2500 | LARGE T&R |
|
| TS5A23159DGST |
ACTIVE |
-40 to 85 |
0.80 | 1ku |
MSOP (DGS) | 10 |
250 | SMALL T&R |
|
| TS5A23159DGSTE4 |
ACTIVE |
-40 to 85 |
0.80 | 1ku |
MSOP (DGS) | 10 |
250 | SMALL T&R |
|
| TS5A23159DGSTG4 |
ACTIVE |
-40 to 85 |
0.80 | 1ku |
MSOP (DGS) | 10 |
250 | SMALL T&R |
|
| TS5A23159RSER |
ACTIVE |
-40 to 85 |
0.49 | 1ku |
UQFN (RSE) | 10 |
3000 | LARGE T&R |
|
| TS5A23159RSERG4 |
ACTIVE |
-40 to 85 |
0.49 | 1ku |
UQFN (RSE) | 10 |
3000 | LARGE T&R |
|
TS5A23159 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TS5A23159DGSR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGSR |
TS5A23159DGSR |
| TS5A23159DGSRE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGSRE4 |
TS5A23159DGSRE4 |
| TS5A23159DGSRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGSRG4 |
TS5A23159DGSRG4 |
| TS5A23159DGST |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGST |
TS5A23159DGST |
| TS5A23159DGSTE4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGSTE4 |
TS5A23159DGSTE4 |
| TS5A23159DGSTG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159DGSTG4 |
TS5A23159DGSTG4 |
| TS5A23159RSER |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159RSER |
TS5A23159RSER |
| TS5A23159RSERG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
TS5A23159RSERG4 |
TS5A23159RSERG4 |
TS5A23159 应用技术支持与电子电路设计开发资源下载
- TS5A23159 数据资料 dataSheet 下载.PDF
- TI 德州仪器信号开关产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
