UC3714 辅助开关 FET 驱动器
UC3714 描述
|
UC2714 |
UC3714 |
| No. of Outputs |
2 |
2 |
| Driver Configuration |
Inverting, Non-Inverting |
Inverting, Non-Inverting |
| VCC(Min)(V) |
7 |
7 |
| VCC(Max)(V) |
20 |
20 |
| Peak Output Current(A) |
1 |
1 |
| Rise Time(ns) |
30 |
30 |
| Fall Time(ns) |
25 |
25 |
| Prop Delay(ns) |
50 |
50 |
| Input Threshold |
TTL |
TTL |
| Pin/Package |
8PDIP, 8SOIC |
16SOIC, 8PDIP, 8SOIC |
| Rating |
Catalog |
Catalog |
| Operating Temperature Range(°C) |
-40 to 85 |
0 to 70 |
These two families of high speed drivers are designed to provide drive waveforms for complementary switches. Complementary switch configurations are commonly used in synchronous rectification circuits and active clamp/reset circuits, which can provide zero voltage switching. In order to facilitate the soft switching transitions, independently programmable delays between the two output waveforms are provided on these drivers. The delay pins also have true zero voltage sensing capability which allows immediate activation of the corresponding switch when zero voltage is applied. These devices require a PWM-type input to operate and can be interfaced with commonly available PWM controllers.
In the UC1714 series, the AUX output is inverted to allow driving a p-channel MOSFET.
UC3714 特性
- Single Input (PWM and TTL Compatible)
- High Current Power FET Driver, 1.0A Source/2A Sink
- Auxiliary Output FET Driver, 0.5A Source/1A Sink
- Time Delays Between Power and Auxiliary Outputs Independently Programmable from 50ns to 500ns
- Time Delay or True Zero-Voltage Operation Independently Configurable for Each Output
- Switching Frequency to 1MHz
- Typical 50ns Propagation Delays
- ENBL Pin Activates 220uA Sleep Mode
- Power Output is Active Low in Sleep Mode
- Synchronous Rectifier Driver
UC3714 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| UC3714D |
ACTIVE |
-40 to 85 |
1.15 | 1ku |
SOIC (D) | 8 |
75 | TUBE |
UC3714D |
| UC3714DG4 |
ACTIVE |
-40 to 85 |
1.15 | 1ku |
SOIC (D) | 8 |
75 | TUBE |
UC3714D |
| UC3714N |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
PDIP (P) | 8 |
50 | TUBE |
UC3714N |
| UC3714NG4 |
ACTIVE |
-40 to 85 |
1.35 | 1ku |
PDIP (P) | 8 |
50 | TUBE |
UC3714N |
UC3714 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| UC3714N |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
N/A for Pkg Type |
|
UC3714N |
| UC3714NG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
N/A for Pkg Type |
UC3714NG4 |
UC3714NG4 |
| UC3714T |
Green (RoHS & no Sb/Br) |
CU SN |
N/A for Pkg Type |
|
UC3714T |
| UC3714TG3 |
Green (RoHS & no Sb/Br) |
CU SN |
N/A for Pkg Type |
|
UC3714TG3 |
UC3714 应用技术支持与电子电路设计开发资源下载
- UC3714 数据资料 dataSheet 下载.PDF
- TI 德州仪器AC/DC 和 DC/DC 电源产品选型与价格参考 . xls
- Dual MOSFET Driver
(PDF 498 KB)
- 标准线性产品交叉参考 (Rev. D)
(PDF 1058 KB)
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
UC3714 工具与软件
