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ATF1502AS-10JU44 CPLD可编程逻辑器件PLCC-44封装

Commercial tpd	-7 ns, 5, -10 ns, -1..
Generic Part .	1502
I/O Pins	44
Macrocells	32
Registers	32
Usable Gates	750
Vcc (V)	5.0
Packages	PLCC 44 TQFP 44
Pb-Free Packages	PLCC 44 TQFP 44

32 Macro-cells (MC), Low power, Vcc-5 V, Green Package, CPLD

The ATF1502AS is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 32 logic macrocells and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1502AS’s enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications. The ATF1502AS has up to 32 bi-directional I/O pins and four dedicated input pins, depending on the type of device package selected. Each dedicated pin can also serve as a global control signal, register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell.

ATF1502AS-10JU44 特征

• High-density, High-performance, Electrically-erasable Complex Programmable
  Logic Device
  – 32 Macrocells
  – 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
  – 44 Pins
  – 7.5 ns Maximum Pin-to-pin Delay
  – Registered Operation up to 125 MHz
  – Enhanced Routing Resources
• In-System Programmability (ISP) via JTAG
• Flexible Logic Macrocell
  – D/T Latch Configurable Flip-flops
  – Global and Individual Register Control Signals
  – Global and Individual Output Enable
  – Programmable Output Slew Rate
  – Programmable Output Open Collector Option
  – Maximum Logic Utilization by Burying a Register with a COM Output
• Advanced Power Management Features
• Automatic 10 μA Standby for “L” Version
• Pin-controlled 1 mA Standby Mode
• Programmable Pin-keeper Inputs and I/Os
• Reduced-power Feature per Macrocell
• Available in Commercial and Industrial Temperature Ranges
• Available in 44-lead PLCC and TQFP
• Advanced EEPROM Technology
  – 100% Tested
  – Completely Reprogrammable
  – 10,000 Program/Erase Cycles
  – 20-year Data Retention
  – 2000V ESD Protection
  – 200 mA Latch-up Immunity
• JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
• PCI-compliant
• Security Fuse Feature
• Green (Pb/Halide-fee/RoHS Compliant) Package Options

ATF1502AS-10JU44 订货型号

Devices	tPD (ns)	tCOS (ns)	fMAX (MHz)	Ordering Code	Package	Operation Range
ATF1502AS	7.5	4.5	166.7	ATF1502AS-7AX44 ATF1502AS-7JX44	44A 44J	Commercial (0°C to 70°C)
	10	5	125	ATF1502AS-10AU44 ATF1502AS-10JU44	44A 44J	Industrial (-40°C to 85°C)
ATF1502ASL	25	13	60	ATF1502ASL-25AU44 ATF1502ASL-25JU44	44A 44J	Industrial (-40°C to 85°C)

ATF1502AS-10JU44 应用技术支持与电子电路设计开发资源下载

1. ATMEL 爱特梅尔PLD可编程逻辑器件ATF1502AS 数据手册DataSheet 下载.PDF
2. ATMEL 产品选型目录. PDF
3. 相关SPLD / CPLD 可编程逻辑选型表
4. Atmel CPLD Reference Designs . pdf(White Paper, 17 pages, updated 1/01)
   This document describes three full applications using Logic Doubling techniques: 1) 8255 Serial IO expander with IO enable on every pin, 2) Low Power Serial IO expander and 32 LED driver, 3) Four 8-bit PWM generators, bus interface and value latches. Each fits in a 32 macrocell ATF1502 device. It also describes how to add transparent pin latch, ala HC573/373 into a corner of your CPLD. Click here for the Reference Design files for all these designs, plus a fourth Low Power Serial IO expander and 32 LCD driver application that uses each macrocell three ways and a Logic Doubling Tutorial.
5. ATF15xx-DK2 CPLD 开发套件用户手册. pdf (User Guide, 47 pages, updated 8/02)
   CPLD Development/Programmer Kit User Guide.
6. ATF15xx 系列ISP 器件用户手册. pdf (User Guide, 54 pages, updated 7/01)
   This document describes in detail the ATDH11xxPC series of ISP Board, Adapter Boards, Atmel's ATMISP software and Atmel's ISP download cable and gives detailed instructions for their use in programming Atmel's ATF15xx family of In-System Programmable CPLDs.
7. ATF15xx 系列CPLD概述. pdf