ATF1504ASV-15JU44 CPLD可编程逻辑器件PLCC-44封装

Commercial tpd -15 ns, -20 ns
Generic Part . 1504
I/O Pins 44, 68,
84, 100
Macrocells 64
Registers 64
Usable Gates 1500
Vcc (V) 3.3
Packages TQFP 100
PLCC 44
PLCC 68
PLCC 84
TQFP 44
Pb-Free Packages TQFP 100
PLCC 44
PLCC 84
TQFP 44

Low voltage, Vcc-3.3V, 64 MC, ISP, Green package, CPLD

The ATF1504ASV(L) is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable memory technology. With 64 logic macrocells and up to 68 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1504ASV(L)’s enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications. The ATF1504ASV(L) has up to 68 bi-directional I/O pins and four dedicated input pins, depending on the type of device package selected. Each dedicated pin can also serve as a global control signal, register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell. Each of the 64 macrocells generates a buried feedback that goes to the global bus. Each input and I/O pin also feeds into the global bus. The switch matrix in each logic block then selects 40 individual signals from the global bus. Each macrocell also generates a foldback logic term that goes to a regional bus. Cascade logic between macrocells in the ATF1504ASV(L) allows fast, efficient generation of complex logic functions. The ATF1504ASV(L) contains four such logic chains, each capable of creating sum term logic with a fan-in of up to 40 product terms. The ATF1504ASV(L) macrocell, shown in Figure 1, is flexible enough to support highlycomplex logic functions operating at high speed. The macrocell consists of five sections: product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop, output select and enable, and logic array inputs.

ATF1504ASV-15JU44 特征
ATF1504ASV-15JU44 订货型号
Devices tPD
(ns)
tCOS
(ns)
fMAX
(MHz)
Ordering Code Package Operation Range
ATF1504ASV 15 8 100 ATF1504ASV-15AU44
ATF1504ASV-15JU44
ATF1504ASV-15AU100
44A
44J
100A
Commercial (0°C to 70°C)
ATF1504ASVL 20 12 83.3 ATF1504ASVL-20AU44
ATF1504ASVL-20JU44
ATF1504ASVL-20AU100
44A
44J
100A
Industrial (-40°C to 85°C)
ATF1504ASV-15JU44 应用技术支持与电子电路设计开发资源下载
  1. ATMEL 爱特梅尔PLD可编程逻辑器件ATF1504ASV 数据手册DataSheet 下载.PDF
  2. ATMEL 产品选型目录. PDF
  3. 相关SPLD / CPLD 可编程逻辑选型表
  4. Atmel CPLD Reference Designs . pdf(White Paper, 17 pages, updated 1/01)
    This document describes three full applications using Logic Doubling techniques: 1) 8255 Serial IO expander with IO enable on every pin, 2) Low Power Serial IO expander and 32 LED driver, 3) Four 8-bit PWM generators, bus interface and value latches. Each fits in a 32 macrocell ATF1502 device. It also describes how to add transparent pin latch, ala HC573/373 into a corner of your CPLD. Click here for the Reference Design files for all these designs, plus a fourth Low Power Serial IO expander and 32 LCD driver application that uses each macrocell three ways and a Logic Doubling Tutorial.
  5. ATF15xx-DK2 CPLD 开发套件用户手册. pdf (User Guide, 47 pages, updated 8/02)
    CPLD Development/Programmer Kit User Guide.
  6. ATF15xx 系列ISP 器件用户手册. pdf (User Guide, 54 pages, updated 7/01)
    This document describes in detail the ATDH11xxPC series of ISP Board, Adapter Boards, Atmel's ATMISP software and Atmel's ISP download cable and gives detailed instructions for their use in programming Atmel's ATF15xx family of In-System Programmable CPLDs.
  7. ATF15xx 系列CPLD概述. pdf