74LV132A：标准逻辑
| Part Number | Data Sheet | SPICE Model | Number of Gates | Family | VCC Min (V) | VCC Max (V) | tpd max @ (1.5V) (ns) | tpd max @ (1.8V) (ns) | tpd max @ (2.5V) (ns) | tpd max @ (3.3V) (ns) | tpd max @ (5.0V) (ns) | Input/ Output Current |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV132A | 74LV132A.pdf | - | 4 | LV | 2 | 5.5 | - | - | 20.2 | 15.4 | 9.699 | 12 |
Description
The 74LV132A provides provides four independent 2-input NANDgates with standard push-pull outputs. Each input is a Schmitt Triggerdevice with a significant amount of hysteresis suiting the device fornoisy environments. The device is designed for operation with apower supply range of 2.0V to 5.5V.The inputs are tolerant to 5.5V allowing this device to be used in amixed voltage environment. The device is fully specified for partialpower down applications using IOFF. The IOFF circuitry disables theoutput preventing damaging current backflow when the device ispowered down.
Application
- General Purpose Logic
- Power Down Signal Isolation
- Wide array of products such as:
- - PCs, networking, notebooks, ultrabooks, netbooks
- - Computer peripherals, hard drives, CD/DVD ROM
- - TV, DVD, DVR, set top box
订购型号
- 74LV132AS14-13
- 74LV132AT14-13
TSSOP-14
SO-14
- 74LV132A.pdf 74LV132A
